makefile multiple main 带通配符

Question

我想编译很多在包含许多电源的文件夹中自动找到的电源。

SOURCES       = $(wildcard src/shared/*.cc)
OBJECTS       = $(SOURCES:%.cc/%.o)
MAINS_SOURCES = $(wildcard src/mains/*.cc)
MAINS_OBJECTS = $(MAINS_SOURCES:%.cc=%.o)
PROGRAMS_NAME = $(MAINS_SOURCES:src/mains/%.cc=%)

目前我有这段代码，当然，它不能用于多个 main。

$(PROGRAMS_NAME):$(OBJECTS) $(MAINS_OBJECTS)
    $(CXX) $(LIBS) $(OBJECTS) $(MAINS_OBJECTS) -o $@

如何为每个主电源正确拆分 $(MAINS_OBJECTS)？

谢谢！

Answer 1

对于这种情况static pattern rules通常很方便：

SOURCES       = $(wildcard src/shared/*.cc)
OBJECTS       = $(SOURCES:%.cc/%.o)
MAINS_SOURCES = $(wildcard src/mains/*.cc)
MAINS_OBJECTS = $(MAINS_SOURCES:%.cc=%.o)
PROGRAMS_NAME = $(MAINS_SOURCES:src/mains/%.cc=%)

$(OBJECTS) $(MAINS_OBJECTS): %.o: %.cc
    $(CXX) $(CXXFLAGS) -c $< -o $@

$(PROGRAM_NAME): %: src/mains/%.o $(OBJECTS)
    $(CXX) $(LIBS) $^ -o $@

makefile multiple main 带通配符

makefile multiple main with wildcard

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