ModelSim 过程中的致命错误 RAM_i1/RAM_0_0_0/P107 格子 MACHXO3L_MISC.vhd

Question

当我尝试在 ModelSim 中模拟一个设计时，我遇到了一个致命错误，该设计为莱迪思半导体的目标设备 MACHXO3L 实例化了一个 RAM IP。我编译了他们的库以在 ModelSim 中使用，但由于以下致命错误，模拟总是停止：

# ** Fatal: (vsim-3483) Delay in signal assignment is not ascending.
#    Time: 20 ns  Iteration: 1  Process: /fft_tb/fft_i/RAM_i1/RAM_0_0_0/P107 File: C:/lscc/diamond/3.11_x64/cae_library/simulation/script/../vhdl/machxo3l/src/MACHXO3L_MISC.vhd Line: 541
# Fatal error in Process P107 at C:/lscc/diamond/3.11_x64/cae_library/simulation/script/../vhdl/machxo3l/src/MACHXO3L_MISC.vhd line 541

ModelSim 致命错误：

有什么想法吗？看来问题出在 Lattice 库 MACHXO3L_MISC.vhd line 541

Answer 1

按照@user1155120 的正确建议，通过更改模拟时间分辨率解决了该问题。我通过修改 modelsim.ini 文件将其更改为皮秒。需要修改的参数为：

; Set SystemC default time unit.
; Set to fs, ps, ns, us, ms, or sec with optional 
; prefix of 1, 10, or 100.  The default is 1 ns.
; The ScTimeUnit value is honored if it is coarser than Resolution.
; If ScTimeUnit is finer than Resolution, it is set to the value
; of Resolution. For example, if Resolution is 100ps and ScTimeUnit is ns,
; then the default time unit will be 1 ns.  However if Resolution 
; is 10 ns and ScTimeUnit is ns, then the default time unit will be 10 ns.
ScTimeUnit = ps

您可能还希望或需要更改项目文件夹中 .mpf 文件中的相同参数。如果这不会改变模拟分辨率，您可以在 vsim 命令中隐式执行此操作：

vsim work.<your_test_bench> -t ps

ModelSim 过程中的致命错误 RAM_i1/RAM_0_0_0/P107 格子 MACHXO3L_MISC.vhd

ModelSim Fatal error in process RAM_i1/RAM_0_0_0/P107 Lattice MACHXO3L_MISC.vhd

fpga

modelsim

lattice