在 Zynq 设备(Zybo 和 ZedBoard)上引导 Linux 内核

Booting Linux Kernel on Zynq Devices (Zybo and ZedBoard)

我们正在尝试按照 wiki-xilinx-linux 中的说明在 xilinx 系统中启动 linux。 经过大量不同的测试,在查看(以及其他)here 之后,我们启用了选项 "LOW LEVEL KERNEL DEBUGGING AND EARLYPRINTKs"。多亏了这一点,我们能够看到以下内容:

U-Boot 2016.07-03720-g95e11f6 (Oct 13 2016 - 03:48:21 -0700)

Model: Zynq MMC:   sdhci@e0100000: 0
SF: Detected S25FL256S_64K with page size 256 Bytes, eIn:    serial@e0001000
Out:   serial@e0001000
Err:   serial@e0001000
Model: Z00b000
Hit any key to stop autoboot:  0 
Copying Linux from SD to RAM...
Device: sdhci@e0100000
Manufacturer ID: 2
OEM: 544d
Name: SA04G 
Tran Speed:reading uImage
3842280 bytes read in 342 ms (10.7 MiB/s)
reading devicetree.dtb
8955 bytes read in 20 ms (436.5 KiB/s)
## Booting kernel from Legacy Image at 0008000
   Entry Point:  00008000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 02a00000
   Booting using the fdt blob at OK
   Loading Device Tree to 1eb0e000, end 1eb132fa ... OK

Starting kernel .... done, booting the kernel.
Booting Linux on physical CPU 0x0
Linux version 4.6.0-xilinx-22282-g7d819bd (leProcessor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasiMemory policy: Data cache writealloc
percpu: Embedded 12 pages/cpu @debcd000 s1115200 root=/dev/mmcblk0p2 rw rootwait
PID hash table entries: 2048 (order: 1, (order: 5, 131072 bytes)
Memory: 494528K/524288K available (5304K kernel code, or  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xffc00000 - 0xfff00000( 512 MB)
    pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
    modules : 0xbf   .data : 0xc0900000 - 0xc0939b60   ( 231 kB)
       .bss : 0xc0939b60 - 0xc09R_CPUS=4 to nr_cpu_ids=2.
RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cp00 -> 0x72760000
L2C: DT/platform modifies aux control register: 0x72360000 -> ortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gatnq_clock_init: clkc starts at e0802100
Zynq clock init
sched_clock: 64 bits at_idle_ns: 440795209040 ns
Switching to timer-based delay loop, resolution 3ns
my device 80x30
Calibrating delay loop (skipped), value calculated using timer )
Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
CPU: Testinx100058
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
Brought up 2 CPUs
SMP
   VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksT: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic cohe maximum watchpoint size is 4 bytes.
zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256interface driver usbfs
usbcore: registered new interface driver hub
usbcore: r00
pps_core: LinuxPPS API ver. 1 registered
pps_core: Software ver. 5.3.6 - CoLinux Sound Architecture Driver Initialized.
clocksource: Switched to clocksourle entries: 4096 (order: 3, 32768 bytes)
TCP: Hash tables configured (establish (order: 1, 8192 bytes)
NET: Registered protocol family 1
RPC: Registered nameRegistered tcp NFSv4.1 backchannel transport module.
hw perfevents: enabled witx_order=17 bucket_order=0
jffs2: version 2.2. (NAND) (SUMMARY)  © 2001-2006 Rever for PL330 DMAC-241330
dma-pl330 f8003000.dmac:    DBUFF-128x8bytes Num_Chans-led
xdevcfg f8007000.devcfg: ioremap 0xf8007000 to e086c000
[drm] Initialized brd: module loaded
loop: module loaded
CAN device driver interface
libphy: MACB_mii_bus: probed
macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 145 (0rne:00, irq=-1)
e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
e1000e: Copci-pci: EHCI PCI platform driver
usbcore: registered new interface driver usb-si2c /dev entries driver
EDAC MC: ECC not enabled
Xilinx Zynq CpuIdle Driver ste Ossman
sdhci-pltfm: SDHCI platform and OF driver helper
mmc0: Invalid maximummc0: SDHCI controller on e0100000.sdhci [e0100000.sdhci] using ADMA
ledtrig-cphid: USB HID core driver
NET: Registered protocol family 10
sit: IPv6 over IPv4 tunneling driver
NET: Registered protocol family 17
can: controller ar protocol (rev 20120528 t)
can: netlink gateway (rev 20130117) max_hops=1
Regards found.
Waiting for root device /dev/mmcblk0p2...
mmc0: new high speed SDHCmmcblk0: p1 p2
VFS: Cannot open root device "mmcblk0p2" or unknown-block(179,2): error -30
Ple4 ram1  (driver?)
0102           16384 ram2  (driver?)
0103           16384 ra     16384 ram7  (driver?)
0108           16384 ram8  (driver?)
0109          0c           16384 ram12  (driver?)
010d           16384 ram13  (driver?)
010e ?)
b300         3813376 mmcblk0  driver: mmcblk
  b301         1048576 mmcblk0: Unable to mount root fs on unknown-block(179,2)
CPU1: stopping
CPU: 1 PID: 0nd_backtrace) from [<c010a608>] (show_stack+0x10/0x14)
[<c010a608>] (show_stackb24>] (ipi_cpu_stop+0x3c/0x70)
[<c010cb24>] (ipi_cpu_stop) from [<c010d394>] (h4>] (__irq_svc+0x54/0x90)
Exception stack(0xde46ff70 to 0xde46ffb8)
ff60:     01 debdc5c0 474d4ec6 00000000 45283f08 00000000 00000000 00000000
ffa0: 0000000/0x1c0)
[<c0492ccc>] (cpuidle_enter_state) from [<c014a72c>] (cpu_startup_entryFS: Unable to mount root fs on unknown-block(179,2)

虚拟文件系统似乎试图从某个未知块中读取:

VFS: Cannot open root device "mmcblk0p2" or unknown-block(179,2): error -30

谷歌搜索,没有找到解决方案。 有人知道如何解决这个问题吗?哪里可以看?使用哪个参数?

您已将其设置为使用 mmcblk0p2 上的根文件系统 - 您的 SD 卡的第二个分区。如果文件系统确实放在那里,您必须验证内核是否支持分区格式化的内容(例如 ext3)。 这是预构建的镜像还是您自己构建的? 如果您在构建前使用命令 petalinux-config,您可以更改文件系统存储位置的设置。 顺便说一句,这是一个非常常见的问题,因此如果您在 google 时使用正确的术语,您应该会找到很多信息。

最后我解决了我遇到的所有问题(运行 linux 在 Zybo 上使用可编程逻辑中的自定义硬件)。是的,因为我是初学者,所以发现了不同的问题:

1) 问题之一在于 .dts:带有 eFuse 的部分完全缺失。 Xilinx 提交了另一个版本的 .dts 并修复了问题。

2) 另一个大问题是比特流:一开始我想在 Zybo 上使用 运行 linux 使用 cat bitstream.bit > /dev/xdevcfg 对 PL 进行编程。当然,这是完全可能的(我测试过),因为它在 [this wiki-page][1] 中有解释。问题:如果您在 FPGA 中有自定义硬件,您在设备树中也有它的描述。内核尝试初始化所有连接到 PS 的外围设备,但是,当然,PL 还没有连接!!解决方案是先下载比特流,将其包含在 boot.bif 中,以便以正确的方式生成 boot.bin

    image : {
        [bootloader]fsbl.elf
        bitstream.bit
        u-boot.elf
        devicetree.dtb
        uramdisk.image.gz
        uImage.bin   // currently bootgen requires a file extension. this is just a renamed uImage
}

当然使用:bootgen -image boot.bif -o i boot.bin。 还有其他一些小问题,我会在以后对该答案的编辑修订中尝试添加一个列表。

更新:

解决题中描述的问题,如果没有额外的problems/errors,加bootargs选项rootdelay=3应该就够了(rootdelay——尝试挂载根文件系统之前的延迟时间)。 这可能是必要的,因为 u-boot 尝试访问 SD 的速度太快,而 SD 还没有准备好。