如果 RISCV LOAD 大于剩余内存，会发生什么情况？
What happens with a RISCV LOAD wider than there is memory left?
以下程序的行为是什么？
li t0, 0xFFFFFFFF
lw t1, 0(t0)
是否定义了这个实现（MMU或执行环境）？我在 RISC-V 规范中找不到任何关于这种情况的提及。
RISC-V 特权 ISA 将物理内存分为三种类型：主内存、I/O 和空内存。
Empty regions are also classified as I/O regions but with attributes
specifying that no accesses are supported.
文档继续说，与主内存（始终支持 R/W）相反，I/O 区域，因此是空白区域，可以指定支持哪些访问。
I/O regions can specify which combinations of read, write, or execute accesses to which data widths
are supported.
每个区域都有一个或多个物理内存属性 (PMA)，表明该区域是否被缓存、支持原子操作、是否有序以及支持哪种数据大小。
区域的 PMA 必须由硬件检查，如果违反任何约束，则会报告陷阱或中断：
PMAs are checked for any access to physical memory, including accesses that have undergone virtual to physical memory translation. To aid in system debugging, we strongly recommend that, where possible, RISC-V
processors precisely trap physical memory accesses that fail PMA checks. Precise PMA traps might not always be possible, for example, when probing a legacy bus architecture that uses access failures as part of the discovery mechanism. In this case, error responses from slave devices will be reported as imprecise bus-error interrupts.
规范没有对空白区域强加任何 PMA，也没有定义任何 PMA 值，它明确指出
As PMAs are tightly tied to a given physical platform’s organization, many details are inherently platform-specific, as is
the means by which software can learn the PMA values for a platform.
访问不存在的 RAM 地址时会发生什么，留给实现定义的特定 微架构 处理。
通常内存总线有pull-up/pull-down个电阻。在这种情况下，从一个不存在的地址读取将导致一个由 1 或 0 组成的字，而写入将被忽略。
根据硬件，结果可以是任何结果，甚至是表示总线上事务失败的异常。
以下程序的行为是什么？
li t0, 0xFFFFFFFF
lw t1, 0(t0)
是否定义了这个实现（MMU或执行环境）？我在 RISC-V 规范中找不到任何关于这种情况的提及。
RISC-V 特权 ISA 将物理内存分为三种类型：主内存、I/O 和空内存。
Empty regions are also classified as I/O regions but with attributes specifying that no accesses are supported.
文档继续说，与主内存（始终支持 R/W）相反，I/O 区域，因此是空白区域，可以指定支持哪些访问。
I/O regions can specify which combinations of read, write, or execute accesses to which data widths are supported.
每个区域都有一个或多个物理内存属性 (PMA)，表明该区域是否被缓存、支持原子操作、是否有序以及支持哪种数据大小。
区域的 PMA 必须由硬件检查，如果违反任何约束，则会报告陷阱或中断：
PMAs are checked for any access to physical memory, including accesses that have undergone virtual to physical memory translation. To aid in system debugging, we strongly recommend that, where possible, RISC-V processors precisely trap physical memory accesses that fail PMA checks. Precise PMA traps might not always be possible, for example, when probing a legacy bus architecture that uses access failures as part of the discovery mechanism. In this case, error responses from slave devices will be reported as imprecise bus-error interrupts.
规范没有对空白区域强加任何 PMA，也没有定义任何 PMA 值，它明确指出
As PMAs are tightly tied to a given physical platform’s organization, many details are inherently platform-specific, as is the means by which software can learn the PMA values for a platform.
访问不存在的 RAM 地址时会发生什么，留给实现定义的特定 微架构 处理。
通常内存总线有pull-up/pull-down个电阻。在这种情况下，从一个不存在的地址读取将导致一个由 1 或 0 组成的字，而写入将被忽略。
根据硬件，结果可以是任何结果，甚至是表示总线上事务失败的异常。