我如何知道缓存设计中块 "section/offset" 的大小？
How do I know size of a block "section/offset" in cache design?
我无法理解如何确定 tag/index/offset 位，因为问题的措辞让我感到困惑。澄清一下，体系结构中的一个字是 64 位。
这是第一个问题：
Caches are important to providing a high-performance memory hierarchy
to processors. Below is a list of 64-bit memory address references,
given as word addresses. 0x03, 0xb4, 0x2b, 0x02, 0xbf, 0x58, 0xbe,
0x0e, 0xb5, 0x2c, 0xba, 0xfd
For each of these references, identify the binary word address, the
tag, the index, and the offset given a direct-mapped cache with
two-word blocks and a total size of eight blocks. Also list if each
reference is a hit or a miss, assuming the cache is initially empty.
解决方案表明偏移量由1位组成，因为它需要1位来表示2个不同的块"words"。所以我试图将块可视化为 2 个部分（偏移量）。我怎么知道你应该将块拆分成单词（为什么不是字节）？显然，块中的部分决定了表示块部分所需的偏移位数。但是2个字就是16个字节，那么为什么块不分成16个部分来表示字节而不是2个部分来表示字呢？如果块被分成 16 个部分（对于 2 个字的所有字节），是否需要 4 个偏移位来确定块中的 16 个不同字节部分？我很想知道如何计算块部分应该有多大。说 "two-word blocks" 的问题是否暗示我应该将块可视化为拆分成单词？ 2 字块与 16 字节块相同吗？ (一个字是8个字节)
下面的问题提到了字节寻址，这让我很困惑。它有什么关系？:
By convention, a cache is named according to the amount of data it
contains (i.e., a 4 KiB cache can hold 4 KiB of data); however, caches
also require SRAM to store metadata such as tags and valid bits. For
this exercise, you will examine how a cache’s configuration affects
the total amount of SRAM needed to implement it as well as the
performance of the cache. For all parts, assume that the caches are
byte addressable, and that addresses and words are 64 bits.
Calculate the total number of bits required to implement a 32 KiB
cache with two- word blocks.
这两个问题都来自 Computer Organization and Design by David Patterson 和 John L Hennessy
How do I know that you are supposed to split the blocks into words (why not bytes)?
因为你有字地址，而不是字节地址。也就是说，您的内存可以使用这种形式的地址进行字寻址。
要从您的字地址中获取字节地址，您需要附加 3 个零。
Is a 2-word block the same as a 16-byte block?
是的，缓存行大小是 16 字节。
我无法理解如何确定 tag/index/offset 位，因为问题的措辞让我感到困惑。澄清一下，体系结构中的一个字是 64 位。 这是第一个问题：
Caches are important to providing a high-performance memory hierarchy to processors. Below is a list of 64-bit memory address references, given as word addresses. 0x03, 0xb4, 0x2b, 0x02, 0xbf, 0x58, 0xbe, 0x0e, 0xb5, 0x2c, 0xba, 0xfd
For each of these references, identify the binary word address, the tag, the index, and the offset given a direct-mapped cache with two-word blocks and a total size of eight blocks. Also list if each reference is a hit or a miss, assuming the cache is initially empty.
解决方案表明偏移量由1位组成，因为它需要1位来表示2个不同的块"words"。所以我试图将块可视化为 2 个部分（偏移量）。我怎么知道你应该将块拆分成单词（为什么不是字节）？显然，块中的部分决定了表示块部分所需的偏移位数。但是2个字就是16个字节，那么为什么块不分成16个部分来表示字节而不是2个部分来表示字呢？如果块被分成 16 个部分（对于 2 个字的所有字节），是否需要 4 个偏移位来确定块中的 16 个不同字节部分？我很想知道如何计算块部分应该有多大。说 "two-word blocks" 的问题是否暗示我应该将块可视化为拆分成单词？ 2 字块与 16 字节块相同吗？ (一个字是8个字节)
下面的问题提到了字节寻址，这让我很困惑。它有什么关系？:
By convention, a cache is named according to the amount of data it contains (i.e., a 4 KiB cache can hold 4 KiB of data); however, caches also require SRAM to store metadata such as tags and valid bits. For this exercise, you will examine how a cache’s configuration affects the total amount of SRAM needed to implement it as well as the performance of the cache. For all parts, assume that the caches are byte addressable, and that addresses and words are 64 bits.
Calculate the total number of bits required to implement a 32 KiB cache with two- word blocks.
这两个问题都来自 Computer Organization and Design by David Patterson 和 John L Hennessy
How do I know that you are supposed to split the blocks into words (why not bytes)?
因为你有字地址，而不是字节地址。也就是说，您的内存可以使用这种形式的地址进行字寻址。
要从您的字地址中获取字节地址，您需要附加 3 个零。
Is a 2-word block the same as a 16-byte block?
是的，缓存行大小是 16 字节。