BIT_VECTOR 和 ARRAY OF BIT 之间的区别
Difference between BIT_VECTOR and ARRAY OF BIT
我开始为我的大学考试学习 VHDL,我有一个问题:BIT_VECTOR 类型和 ARRAY OF BIT 之间的区别是什么?
如前所述here
The bit_vector is a one-dimensional array type with elements being of type Bit. The bit_vector type is predefined in the Standard package.
Syntax:
type bit_vector is array (natural range <>) of bit;
这也可以在 IEEE1076-2008 标准的第 5.3.2.3 节中找到"Predefined array types"。
编辑:我不完整。 bit_vector
是 预定义的 (无约束)数组 bit
。但由于牛是一种动物,但并非每只动物都是牛,因此您可以有更多类型。由于 VHDL 是强类型的,这意味着您不能在没有转换函数的情况下简单地将不同类型连接在一起。
参见下面的示例代码:
entity e is end entity;
architecture a of e is
signal s1 : bit_vector(0 downto 0);
type own_bit_vector is array(natural range <>) of bit;
signal s2 : own_bit_vector(0 downto 0);
begin
-- next line doesn't work
--s2 <= s1;
-- "Error: D:/Hdl/BitVector/BitVector.vhd(7):
-- Signal "s1" is type std.STANDARD.BIT_VECTOR;
-- expecting type own_bit_vector."
-- but this is allowed
process(s1) begin
for i in s1'range loop
s2(i) <= s1(i);
end loop;
end process;
end architecture;
我开始为我的大学考试学习 VHDL,我有一个问题:BIT_VECTOR 类型和 ARRAY OF BIT 之间的区别是什么?
如前所述here
The bit_vector is a one-dimensional array type with elements being of type Bit. The bit_vector type is predefined in the Standard package. Syntax:
type bit_vector is array (natural range <>) of bit;
这也可以在 IEEE1076-2008 标准的第 5.3.2.3 节中找到"Predefined array types"。
编辑:我不完整。 bit_vector
是 预定义的 (无约束)数组 bit
。但由于牛是一种动物,但并非每只动物都是牛,因此您可以有更多类型。由于 VHDL 是强类型的,这意味着您不能在没有转换函数的情况下简单地将不同类型连接在一起。
参见下面的示例代码:
entity e is end entity;
architecture a of e is
signal s1 : bit_vector(0 downto 0);
type own_bit_vector is array(natural range <>) of bit;
signal s2 : own_bit_vector(0 downto 0);
begin
-- next line doesn't work
--s2 <= s1;
-- "Error: D:/Hdl/BitVector/BitVector.vhd(7):
-- Signal "s1" is type std.STANDARD.BIT_VECTOR;
-- expecting type own_bit_vector."
-- but this is allowed
process(s1) begin
for i in s1'range loop
s2(i) <= s1(i);
end loop;
end process;
end architecture;