为什么强内存模型不阻止 cpu 缓存？

Question

Joseph Albahari 在他的博客 here 中表示，即使在强内存顺序 cpu（例如普通的 Intel Core-2 和 Pentium 处理器）上，

This following program never terminates because the complete variable is cached in a CPU register. Inserting a call to Thread.MemoryBarrier inside the while loop (or locking around reading complete) fixes the error.

static void Main()
{
  bool complete = false; 
  var t = new Thread (() =>
  {
    bool toggle = false;
    while (!complete) toggle = !toggle;
  });
  t.Start();
  Thread.Sleep (1000);
  complete = true;
  t.Join();        // Blocks indefinitely
}

根据here，这不应该发生？

A strong hardware memory model is one in which every machine instruction comes implicitly with acquire and release semantics. As a result, when one CPU core performs a sequence of writes, every other CPU core sees those values change in the same order that they were written.

我对这 2 个引号感到困惑，谁能给我更详细的解释？

Answer 1

A strong hardware memory model is one in which every machine instruction comes implicitly with acquire and release semantics. As a result, when one CPU core performs a sequence of writes, every other CPU core sees those values change in the same order that they were written.

内存写入顺序在这个例子中并不重要。随着线程不断轮询，它最终会获取 complete 变量的更新值。

但是，这与内存和缓存有关，它们必须向所有处理器呈现相同的视图。每个 cpu 寄存器都是私有的，不必与其他 cpu 共享它们的内容。

complete变量在线程t的寄存器中。任何其他处理器都无法更新此寄存器，因为它实际上没有链接到内存系统。使变量 volatile 将解决问题，因为它将保留在内存中而不是注册。

This following program never terminates because the complete variable is cached in a CPU register. Inserting a call to Thread.MemoryBarrier inside the while loop (or locking around reading complete) fixes the error.

这两个修复基本上都将变量保存在内存中以使其正常工作。

为什么强内存模型不阻止 cpu 缓存？

Why Strong memory model does not prevent cpu cache?

c#

memory-barriers