STP 中的寄存器存储顺序

Order of register stores in STP

在 AArch64 程序集中,以下行

stp x25, x30, [sp,#48]

在 sp+48 处存储 x25,在 sp+56 处存储 x30,对吗?

是的。来自 this manual,第 C6-1237 页及以下内容:

Signed offset

[...]

64-bit variant

Applies when opc == 10.

STP <Xt1>, <Xt2>, [<Xn|SP>{, #<imm>}]
Decode for all variants of this encoding

boolean wback = FALSE;
boolean postindex = FALSE;
[...]

Shared decode for all encodings

[...]
integer n = UInt(Rn);
integer t = UInt(Rt);
integer t2 = UInt(Rt2);
[...]
integer scale = 2 + UInt(opc<1>);
integer datasize = 8 << scale;
bits(64) offset = LSL(SignExtend(imm7, 64), scale);
[...]

Operation for all encodings

constant integer dbytes = datasize DIV 8;

[...]

if n == 31 then
    CheckSPAlignment();
    address = SP[];
else
    address = X[n];

if !postindex then
    address = address + offset;

[...]
data1 = X[t];
[...]
data2 = X[t2];

Mem[address, dbytes, AccType_NORMAL] = data1;
Mem[address+dbytes, dbytes, AccType_NORMAL] = data2;


让我们从头到尾了解一下。您的 stp x25, x30, [sp,#48] 是 64 位的 signed-offset stp,解码为:

n = 31
t = 25
t2 = 30
scale = 3 // since opc = 0b10
datasize = 64
offset = 48

将其插入到操作伪代码中,用变量替换它们的值,您将有效地得到:

CheckSPAlignment();
Mem[SP[] + 48, 8, AccType_NORMAL] = X[25];
Mem[SP[] + 56, 8, AccType_NORMAL] = X[30];