MIPS 左加载字 (LWL) 和右加载字 (LWR) 指令有什么作用?

What do the MIPS load word left (LWL) and load word right (LWR) instructions do?

最近我一直在阅读 MIPS 指令集,当时我遇到了两条在其他指令集中没有见过的不寻常的指令。

我环顾四周,想找到对这些指令的确切作用的合理解释,但我所能弄清楚的是,它们在某种程度上与未对齐的内存访问有关。

例如,Wikipedia says:

MIPS I requires all memory accesses to be aligned to their natural word boundaries, otherwise an exception is signaled. To support efficient unaligned memory accesses, there are load/store word instructions suffixed by "left" or "right".

但没有进一步详细说明这实际上意味着什么。

我能找到的最接近正确的解释来自 Dr John Lumis's website:

Unaligned words and doublewords can be loaded or stored in just two instructions by using a pair of special instructions. For loads a LWL instruction is paired with a LWR instruction. The load instructions read the left-side or right-side bytes (left or right side of register) from an aligned word and merge them into the correct bytes of the destination register.

但这对我来说似乎还只是故事的一半,我很难弄清楚确切的细节。 IE。我正在努力了解哪些地址的哪些字节会被移动到哪里。

那么这些指令究竟做了什么?

解释应该在 any MIPS 手册中可用:LWR 将加载值的 right 部分(最低有效部分)和LWL 将加载 left 部分

基本上对于地址 A LWL 将加载 4 - A % 4 字节到寄存器的左侧,LWR 将加载剩余的 A % 4 字节到它的右侧。例如,如果 A = 1 如下所示 table

        ├ A             ┤
... ┃ 0 ┆ 1 ┆ 2 ┆ 3 ┃ 4 ┆ 5 ┆ 6 ┆ 7 ┃ ...

然后第一个字包含我们需要的值的3个字节,因此LWL将在地址{1,2,3}处加载3个字节到寄存器,然后剩下的字节将由LWR加载

事实上,Google 上搜索字词 "MIPS LWL LWR" 的第一个结果给了我以下演示

  • lwr , 2([=16=]) # this is a dummy instruction that starts a byte 2 wants to read the 32-bit word starting at that location.

                Memory                                Register 4
                byte 0, byte 1, byte 2, byte 3        byte 0, byte 1, byte 2, byte 3
    address 4:  4       5       6       7             A       B       C       D       before 
    address 0:  0       1       2       3             A       0       1       2       after
    
  • lwl , 2([=17=]) # this is a dummy instruction that starts a byte 2 wants to read the 32-bit word starting at that location.

                Memory                                Register 4
                byte 0, byte 1, byte 2, byte 3        byte 0, byte 1, byte 2, byte 3
    address 4:  4       5       6       7             A       B       C       D       before 
    address 0:  0       1       2       3             2       3       C       D       after
    

http://db.cs.duke.edu/courses/fall02/cps104/homework/lwswlr.html


简单地说:

You give the “load word left” instruction the effective address of the most significant byte of the unaligned word you want to load, and it picks out the correct bytes from the enclosing word and merges them into the upper bytes of the destination register.

The “load word right” works analogously: You give it the effective address of the least significant byte of the unaligned word you want to load, and it picks out the correct bytes from the enclosing word and merges them into the lower bytes of the destination register.

The MIPS R4000, part 6: Memory access (unaligned)


这是 MIPS32 instruction set manual

中的详细信息


来自 MIPS IV ISA

的另一幅插图

另见

MIPS Release 6 起需要加载和存储以支持未对齐的访问,因此 LWL/LWR/SWL/SWR 已被删除