使用 WHEN ELSE 的 VHDL 错误

Question

我是 VHDL 的新手，有一些简单的错误。

基本上我有4个二进制输入和3个二进制输出。条件很简单，如果在所有 4 个输入中我只有一个“1”，输出 l3 接收“1”而其他的“0”，如果我有两个“1”，输出 l2 接收“1”和太多“ 0'，如果我有两个以上的'1'，输出 l1 接收'1'，其他接收'0'。

基本上J1、J2、J3、J4都是输入。 L1、L2 和 L3 是输出。您可以验证 truth table.

我正在尝试使用 EDA Playground 中的这段代码解决这个问题 (https://www.edaplayground.com/)

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY SistemaVotacion IS
PORT (j1, j2, j3, j4: IN std_logic;
      l1, l2, l3: OUT std_logic);
END SistemaVotacion;

ARCHITECTURE SistemaArchitecture OF SistemaVotacion IS
BEGIN
    l1 <= '1' WHEN (j1 = '0' and j2 = '1' and j3 = '1' and j4 = '1')
    ELSE '1' WHEN (j1 = '1' and j2 = '0' and j3 = '1' and j4 = '1')
    ELSE '1' WHEN (j1 = '1' and j2 = '1' and j3 = '0' and j4 = '1')
    ELSE '1' WHEN (j1 = '1' and j2 = '1' and j3 = '1' and j4 = '0')
    ELSE '1' WHEN (j1 = '1' and j2 = '1' and j3 = '1' and j4 = '1')
    ELSE '0';
    l2 <= '1' WHEN (j1 = '0' and j2 = '0' and j3 = '1' and j4 = '1')
    ELSE '1' WHEN (j1 = '0' and j2 = '1' and j3 = '0' and j4 = '1')
    ELSE '1' WHEN (j1 = '0' and j2 = '1' and j3 = '1' and j4 = '0')
    ELSE '1' WHEN (j1 = '1' and j2 = '0' and j3 = '0' and j4 = '1')
    ELSE '1' WHEN (j1 = '1' and j2 = '0' and j3 = '1' and j4 = '0')
    ELSE '1' WHEN (j1 = '1' and j2 = '1' and j3 = '0' and j4 = '0')
    ELSE '0';
    l3 => '1' WHEN (j1 = '0' and j2 = '0' and j3 = '0' and j4 = '0')
    ELSE '1' WHEN (j1 = '0' and j2 = '0' and j3 = '0' and j4 = '1')
    ELSE '1' WHEN (j1 = '0' and j2 = '0' and j3 = '1' and j4 = '0')
    ELSE '1' WHEN (j1 = '0' and j2 = '1' and j3 = '0' and j4 = '0')
    ELSE '1' WHEN (j1 = '1' and j2 = '0' and j3 = '0' and j4 = '0')
    ELSE '0';
END SistemaArchitecture;

但是我遇到了很多错误，例如：

COMP96 错误 COMP96_0015: "';'预期的。” "design.vhd" 24 8
COMP96 错误 COMP96_0019："Keyword 'end' expected." "design.vhd" 24 8
COMP96 错误 COMP96_0016："Design unit declaration expected." "design.vhd" 24 11

我该怎么做？

Answer 1

如 user1155120 所述，问题出在：

What happens if l3 => on line 24 becomes l3 <= ? The parentheses aren't required here, a condition is bounded by reserved words.

我改变了，工作了。

使用 WHEN ELSE 的 VHDL 错误

Errors in VHDL using WHEN ELSE

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