了解逻辑块 LC_5 位

Question

我是 yosys 和 arachne-pnr 的新手。这是 .asc 和 .icebox_explain 的片段。我无法理解 LC_5 的位是如何派生自 .logic_tile 1 11.

example.v

module top (input a, b, output y);
  assign y = a & b;
endmodule

example.asc

.logic_tile 1 11
    000000000000000000000000000000000000000000000000000000
    000000000000000000000000000000000000000000000000000000
    000000000000001000000000000000000000000000000000000000
    000000000000000101000000000000000000000000000000000000
    000000000000000000000000000000000000000000000000000000
    000000000000000000000000000000000000000000000000000000
    000000000000000000000000000000000000000000000000000000
    000000000000000000000000000000000000000000000000000000
    000000000000000000000000000000000000000000000000000000
    000000000000000000000000000000000000000000000000000000
    000000000000000000000000000000011000110000000000000000
    000000000000000000000000000000001110110000000000000000
    000000000000000000000000000000000000000000000000000000
    000000000000001111000000000000000000000000000000000000
    000000000000000000000000000000000000000000000000000000
    000000000000000000000000000000000000000000000000000000

icebox_example.asc

   .logic_tile 1 11
LC_5 0000000000001111 0000
buffer local_g0_4 lutff_5/in_3
buffer local_g3_0 lutff_5/in_2
buffer neigh_op_lft_4 local_g0_4
buffer sp4_h_r_24 local_g3_0

LC_5 0000000000001111 0000 是如何从这个流中生成的？

Given in documentation:
LC_5 B10[36] B10[37] B10[38] B10[39] B10[40] B10[41] B10[42] B10[43] B10[44] B10[45] B11[36] B11[37] B11[38] B11[39] B11[40] B11[41] B11[42] B11[43] B11[44] B11[45]

I guess it should be:

B10-36:45=1100000000
B11-36:45=1100000000

这是不正确的。能帮忙指导一下吗？

Answer 1

LC_5 不是直接的 LC_ 位，而是 16 个 LUT 初始化位，后跟 4 个触发器配置位。

从这些到 LC_ 位索引的映射是另一个步骤，也在底部的 http://www.clifford.at/icestorm/logic_tile.html 中描述。

了解逻辑块 LC_5 位

Understanding logic tile LC_5 bits

yosys

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