我究竟做错了什么？测试平台未正确更新

Question

我正在尝试实现测试台，以便在 3 个滴答声之后，每个输入都获得新的指定值。例如，前 3 秒（或滴答）A = 10，B = 0，然后接下来的 3 秒（3 秒到 6 秒）A = 10，B = 16 等等。但是，在我的实际测试台上，值没有按照我想要的方式更新。我的语法有误吗？

这是我得到的当前值的屏幕截图。我在顶部画了红线来代表每 3 个刻度。

https://gyazo.com/f2c0cddc192d0d6734c98334cd377f12

module ALU_tb();

reg [63:0] A, B;
reg [4:0] FS;
reg cin;

wire cout;
wire [63:0] result;
wire [3:0] status;


     
     Final_ALU dut (
     .A(A),
     .B(B),
     .FS(FS),
     .cin(cin),
     .cout(cout),
     .result(result),
     .status(status)
                    );

initial begin //A+1 //A=10 B=0
A <= 64'b0000000000000000000000000000000000000000000000000000000000001010;
B <= 64'b0000000000000000000000000000000000000000000000000000000000000000;
FS <= 5'b01000;
cin <= 1'b1;
end

always begin //A+B //A=10 B=16
#3
A <= 64'b0000000000000000000000000000000000000000000000000000000000001010;
B <= 64'b0000000000000000000000000000000000000000000000000000000000010000;
FS <= 5'b01000;
cin <= 1'd0;
#3;
end

always begin //A-B //A=10 B=16
#6
A <= 64'b0000000000000000000000000000000000000000000000000000000000001010;
B <= 64'b0000000000000000000000000000000000000000000000000000000000010000;
FS <= 5'b01001;
cin <= 1'd1;
#6; 
end

always begin //A-1 //A=10 , B=1
#9
A <= 64'b0000000000000000000000000000000000000000000000000000000000001010;
B <= 64'b0000000000000000000000000000000000000000000000000000000000000001;
FS <= 5'b01001;
cin <= 1'd1;
#9; 
end

always begin //-A //A=10 , B=0 (just twos complement of A)
#12
A <= 64'b0000000000000000000000000000000000000000000000000000000000001010;
B <= 64'b0000000000000000000000000000000000000000000000000000000000000000;
FS <= 5'b01010;
cin <= 1'd1;
#12; 
end


initial begin
#30 $finish;
end
endmodule

Answer 1

您不应对来自多个 always 块的相同信号进行分配。

解决此问题的一种方法是在 initial 块中使用 fork/join，并删除 always 关键字。这对您的代码进行了最小的更改：

initial begin
    fork
        begin //A+1 //A=10 B=0
        A <= 64'b0000000000000000000000000000000000000000000000000000000000001010;
        B <= 64'b0000000000000000000000000000000000000000000000000000000000000000;
        FS <= 5'b01000;
        cin <= 1'b1;
        end

        begin //A+B //A=10 B=16
        #3
        A <= 64'b0000000000000000000000000000000000000000000000000000000000001010;
        B <= 64'b0000000000000000000000000000000000000000000000000000000000010000;
        FS <= 5'b01000;
        cin <= 1'd0;
        #3;
        end

        begin //A-B //A=10 B=16
        #6
        A <= 64'b0000000000000000000000000000000000000000000000000000000000001010;
        B <= 64'b0000000000000000000000000000000000000000000000000000000000010000;
        FS <= 5'b01001;
        cin <= 1'd1;
        #6; 
        end

        begin //A-1 //A=10 , B=1
        #9
        A <= 64'b0000000000000000000000000000000000000000000000000000000000001010;
        B <= 64'b0000000000000000000000000000000000000000000000000000000000000001;
        FS <= 5'b01001;
        cin <= 1'd1;
        #9; 
        end

        begin //-A //A=10 , B=0 (just twos complement of A)
        #12
        A <= 64'b0000000000000000000000000000000000000000000000000000000000001010;
        B <= 64'b0000000000000000000000000000000000000000000000000000000000000000;
        FS <= 5'b01010;
        cin <= 1'd1;
        #12; 
        end
    join
end

更传统的方法是去掉fork，只在initial块内按顺序驱动所有信号组。然后你将不得不相应地调整你所有的 # 延迟。

我究竟做错了什么？测试平台未正确更新

What am I doing wrong? Testbench not updating correctly

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fpga

quartus

intel-fpga