在 VHDL 中对向量进行排序

Question

我试图对一个向量进行排序，例如，如果输入为 101010，则输出将为 111000。每次我尝试模拟代码时，我的输出总是全为零。

我发布我的代码供您参考。如果我遗漏了什么或者有更好的方法来实现这个，请告诉我

    library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;

entity num_ones_for is
    Port ( A : in  STD_LOGIC_VECTOR (15 downto 0);
           A_S : out  STD_LOGIC_VECTOR (15 downto 0));
end num_ones_for;

architecture Behavioral of num_ones_for is
function sort_binary ( ones :unsigned;a : std_logic_vector) return std_logic_vector is
    variable A1: std_logic_vector ( 15 downto 0) := (others =>'0') ;
    begin
    for i in 15 to(15 - to_integer(ones)) loop
     A1(i) := '1';
    end loop;
    return A1;
    end function sort_binary;
signal ones : unsigned (4 downto 0);
begin

process(A)
variable count : unsigned(4 downto 0) := "00000";
begin

count := "00000";   --initialize count variable.
    for i in 0 to 15 loop   --for all the bits.
        count := count + ("0000" & A(i));   --Add the bit to the count.
    end loop;
    ones <= count;    --assign the count to output.
end process;
A_S <= sort_binary(ones =>ones,a =>A);

end Behavioral;

enter image description here

Answer 1

最后，我解决了大部分错误并稍微改变了代码的逻辑。如果以后有人想写同类型的VHDL代码，可以参考我的代码。如果有更好的方法来解决这个问题，请告诉我总是乐于学习。谢谢

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;

entity num_ones_for is
    Port ( A : in  STD_LOGIC_VECTOR (15 downto 0);
           A_S : out  STD_LOGIC_VECTOR (15 downto 0));
end num_ones_for;

architecture Behavioral of num_ones_for is
function sort_binary ( ones :unsigned;a : std_logic_vector) return std_logic_vector is
    variable A1: std_logic_vector ( 15 downto 0) := (others =>'0') ;
    begin
    for i in 0 to 15 loop
    if i >(15- ones) then
     A1(i) := '1';
     else
     next;
     end if;
    end loop;
    return A1;
    end function sort_binary;
signal ones : unsigned (4 downto 0);
begin

process(A)
variable count : unsigned(4 downto 0);
begin

count := "00000";   --initialize count variable.
    for i in 0 to 15 loop   --for all the bits.
        count := count + ("0000" & A(i));   --Add the bit to the count.
    end loop;
    ones <= count;    --assign the count to output.
end process;
A_S <= sort_binary(ones =>ones,a =>A);

end Behavioral;

enter image description here

在 VHDL 中对向量进行排序

Sorting a vector in VHDL

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