MIPS 和 RISC-V 的区别
MIPS and RISC-V Differences
我一直在尝试学习来自 MIPS 的 RISC-V，最初它们看起来并没有什么不同，尤其是指令集。两者之间有什么显着差异吗？大部分差异在后端吗？
根据 Patterson, D. A. 和 Hennessy, J. L. (2018) 的第 2.16 节。计算机组织与设计：hardware/software 界面。马萨诸塞州剑桥市：Morgan Kaufmann 出版社。 （RISC-V 版本）：
One of the main differences between RISC-V and MIPS is for conditional
branches other than equal or not equal. Whereas RISC-V simply provides branch
instructions to compare two registers, MIPS relies on a comparison instruction that
sets a register to 0 or 1 depending on whether the comparison is true. Programmers
then follow that comparison instruction with a branch on equal to or not equal
to zero depending on the desired outcome of the comparison. Keeping with its
minimalist philosophy, MIPS only performs less than comparisons, leaving it up to
the programmer to switch order of operands or to switch the condition being tested by the branch to get all the desired outcomes. MIPS has both signed and unsigned
versions of the set on less than instructions: slt and sltu.
When we look beyond the core instructions that are most commonly used, the
other main difference is that the full MIPS is a much larger instruction set than
RISC-V [...]
书中的图 2.29 显示了 MIPS 和 RISC-V 指令格式的细微差别：
我想补充一点更具体的是，与 MIPS 中的高 16 位相比，RISC-V 的立即指令使用高 20 位。
例如在 MIPS 中：
lui S0, 0x1234
S0 = 0x1234 0000
而在 RISC-V 它的 S0 = 0x0123 4000
我一直在尝试学习来自 MIPS 的 RISC-V，最初它们看起来并没有什么不同，尤其是指令集。两者之间有什么显着差异吗？大部分差异在后端吗？
根据 Patterson, D. A. 和 Hennessy, J. L. (2018) 的第 2.16 节。计算机组织与设计：hardware/software 界面。马萨诸塞州剑桥市：Morgan Kaufmann 出版社。 （RISC-V 版本）：
One of the main differences between RISC-V and MIPS is for conditional branches other than equal or not equal. Whereas RISC-V simply provides branch instructions to compare two registers, MIPS relies on a comparison instruction that sets a register to 0 or 1 depending on whether the comparison is true. Programmers then follow that comparison instruction with a branch on equal to or not equal to zero depending on the desired outcome of the comparison. Keeping with its minimalist philosophy, MIPS only performs less than comparisons, leaving it up to the programmer to switch order of operands or to switch the condition being tested by the branch to get all the desired outcomes. MIPS has both signed and unsigned versions of the set on less than instructions: slt and sltu.
When we look beyond the core instructions that are most commonly used, the other main difference is that the full MIPS is a much larger instruction set than RISC-V [...]
书中的图 2.29 显示了 MIPS 和 RISC-V 指令格式的细微差别：
我想补充一点更具体的是，与 MIPS 中的高 16 位相比，RISC-V 的立即指令使用高 20 位。
例如在 MIPS 中：
lui S0, 0x1234
S0 = 0x1234 0000
而在 RISC-V 它的 S0 = 0x0123 4000