如何在 GCC 中启用所有 Intel Intrinsic 选项？
How do I enable all Intel Intrinsic options in GCC?
在此处引用 GCC 内置函数：https://gcc.gnu.org/onlinedocs/gcc/x86-Built-in-Functions.html
您可以通过指定编译标志来启用这些功能，例如：gcc -mavx main.c
是否有启用所有这些的标志选项？
如果您想使用本地 CPU 的所有内在属性，您需要使用 -march=native。
- 选项
-march=cpu-type
Generate instructions for the machine type cpu-type. In contrast to
-mtune=cpu-type, which merely tunes the generated code for the specified cpu-type, -march=cpu-type allows GCC to generate code that
may not run at all on processors other than the one indicated.
Specifying -march=cpu-type implies -mtune=cpu-type, except where noted
otherwise.
- 如果 cpu-类型是
native
This selects the CPU to generate code for at compilation time by
determining the processor type of the compiling machine. Using
-march=native enables all instruction subsets supported by the local machine (hence the result might not run on different machines).
Using -mtune=native produces code optimized for the local machine
under the constraints of the selected instruction set.
如果您以其他 CPU 为目标，您希望以内在函数的最小子集为目标。但本征集并不总是在以下架构中增长。例如，并非 tigerlake 中的所有指令都在 alderlake 中，相反：
Intel Tigerlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2,
SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL,
FSGSBASE, RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW,
CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ,
AVX512CD, AVX512VBMI, AVX512IFMA, SHA, CLWB, UMIP, RDPID, GFNI,
AVX512VBMI2, AVX512VPOPCNTDQ, AVX512BITALG, AVX512VNNI, VPCLMULQDQ,
VAES, PCONFIG, WBNOINVD, MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT and
KEYLOCKER instruction set support.
Intel Alderlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2,
SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND,
XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, UMIP,
GFNI-SSE, CLWB, MOVDIRI, MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX,
AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ,
SERIALIZE, HRESET, KL, WIDEKL and AVX-VNNI instruction set support.
参考：
在此处引用 GCC 内置函数：https://gcc.gnu.org/onlinedocs/gcc/x86-Built-in-Functions.html
您可以通过指定编译标志来启用这些功能，例如：gcc -mavx main.c
是否有启用所有这些的标志选项？
如果您想使用本地 CPU 的所有内在属性，您需要使用 -march=native。
- 选项
-march=cpu-type
Generate instructions for the machine type cpu-type. In contrast to -mtune=cpu-type, which merely tunes the generated code for the specified cpu-type, -march=cpu-type allows GCC to generate code that may not run at all on processors other than the one indicated. Specifying -march=cpu-type implies -mtune=cpu-type, except where noted otherwise.
- 如果 cpu-类型是
native
This selects the CPU to generate code for at compilation time by determining the processor type of the compiling machine. Using -march=native enables all instruction subsets supported by the local machine (hence the result might not run on different machines). Using -mtune=native produces code optimized for the local machine under the constraints of the selected instruction set.
如果您以其他 CPU 为目标，您希望以内在函数的最小子集为目标。但本征集并不总是在以下架构中增长。例如，并非 tigerlake 中的所有指令都在 alderlake 中，相反：
Intel Tigerlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, AVX512VBMI, AVX512IFMA, SHA, CLWB, UMIP, RDPID, GFNI, AVX512VBMI2, AVX512VPOPCNTDQ, AVX512BITALG, AVX512VNNI, VPCLMULQDQ, VAES, PCONFIG, WBNOINVD, MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT and KEYLOCKER instruction set support.
Intel Alderlake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, UMIP, GFNI-SSE, CLWB, MOVDIRI, MOVDIR64B, CLDEMOTE, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, KL, WIDEKL and AVX-VNNI instruction set support.
参考：