在没有分页的32位模式下,如何计算物理地址?
In 32-bit mode without paging, how to calculate the physical address?
我是装配新手,被分配了以下任务:
If the processor is in protected 32-bit mode without paging, and for the segment connected to the DS selector states in the descriptor table that it starts from 00036D95h, and the EBX register has the value 000034A7h, from which physical locations will the value be moved to AL after instruction MOV AL, [EBX + 0016h]?
我试着在网上寻找任何类似的例子,但找不到任何东西?有谁知道一些类似的例子,或者任何计算物理位置的公式?
编辑:
你能把这三个数字加起来得到实际地址吗?
Could you just sum up these three numbers to get the physical address?
是的,这就是它的工作原理。
Does anyone know some similar examples, or any formula to calculate the physical location?
一般来说,作为@Peter and @tkausl suggest above, the formula is SEGMENT_BASE + OFFSET
. The SEGMENT_BASE
is just given by the segment descriptor, while the OFFSET
depends on the actual instruction. For MOV instructions (see )你可以有:
MOV REG, [base_reg + index_reg*scale + displacement]
所以完整的公式变成了SEGMENT_BASE + base_reg + index_reg*scale + displacement
。在您的特定情况下,您只有 base_reg
和 displacement
.
作为参考,您可以从 Intel® 64 and IA-32 Architectures Software Developer's Manuals 第 3A 卷第 3.1 节阅读:
Each segment has a segment descriptor, which specifies the size of the segment, the access rights and privilege level for the segment, the segment type, and the location of the first byte of the segment in the linear address space (called the base address of the segment). The offset part of the logical address is added to the base address for the segment to locate a byte within the segment. The base address plus the offset thus forms a linear address in the processor’s linear address space.
If paging is not used, the linear address space of the processor is mapped directly into the physical address space of the processor. The physical address space is defined as the range of addresses that the processor can generate on its address bus.
下图应该让您了解分页和分段如何协同工作:
现在因为没有分页,如果去掉右边的“Paging”部分,剩下的就是“Segmentation”部分,出现如下情况(注意"或右边的Physical Memory):
请注意,上图只是示意性的,您不一定需要让每个段寄存器指向不同的段描述符,但您可以。
我是装配新手,被分配了以下任务:
If the processor is in protected 32-bit mode without paging, and for the segment connected to the DS selector states in the descriptor table that it starts from 00036D95h, and the EBX register has the value 000034A7h, from which physical locations will the value be moved to AL after instruction MOV AL, [EBX + 0016h]?
我试着在网上寻找任何类似的例子,但找不到任何东西?有谁知道一些类似的例子,或者任何计算物理位置的公式?
编辑: 你能把这三个数字加起来得到实际地址吗?
Could you just sum up these three numbers to get the physical address?
是的,这就是它的工作原理。
Does anyone know some similar examples, or any formula to calculate the physical location?
一般来说,作为@Peter and @tkausl suggest above, the formula is SEGMENT_BASE + OFFSET
. The SEGMENT_BASE
is just given by the segment descriptor, while the OFFSET
depends on the actual instruction. For MOV instructions (see
MOV REG, [base_reg + index_reg*scale + displacement]
所以完整的公式变成了SEGMENT_BASE + base_reg + index_reg*scale + displacement
。在您的特定情况下,您只有 base_reg
和 displacement
.
作为参考,您可以从 Intel® 64 and IA-32 Architectures Software Developer's Manuals 第 3A 卷第 3.1 节阅读:
Each segment has a segment descriptor, which specifies the size of the segment, the access rights and privilege level for the segment, the segment type, and the location of the first byte of the segment in the linear address space (called the base address of the segment). The offset part of the logical address is added to the base address for the segment to locate a byte within the segment. The base address plus the offset thus forms a linear address in the processor’s linear address space.
If paging is not used, the linear address space of the processor is mapped directly into the physical address space of the processor. The physical address space is defined as the range of addresses that the processor can generate on its address bus.
下图应该让您了解分页和分段如何协同工作:
现在因为没有分页,如果去掉右边的“Paging”部分,剩下的就是“Segmentation”部分,出现如下情况(注意"或右边的Physical Memory):
请注意,上图只是示意性的,您不一定需要让每个段寄存器指向不同的段描述符,但您可以。