VHDL 10^x LUT With-Select

Question

我必须编写一个 VHDL 代码来计算 10^x 函数，用于 x 的整数值在 0 到 9 之间（包括 0 和 9）。实体应具有一个 4 位无符号整数 (std_logic_vector) 类型输入和一个 32 位无符号整数 (std_logic_vector) 类型输出。 32 位宽度足够 10^9。我必须使用 LUT（查找 table）逻辑来解决问题。为此，我应该在架构块中使用信号分配和 with-select 结构，而根本不使用该过程。通过使用 with-select，我将通过固定分配确定每个 x 值的输出 (LUT)。

开始合成时出错： 赋值宽度不匹配；目标有 32 位，源有 1 位

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity main is
Port ( 
    input : in std_logic_vector(3 downto 0);
    output: out std_logic_vector(31 downto 0)
     );
end main;

architecture Behavioral of main is

begin

with input select
   output <= "00000000000000000000000000000001" when "0000", --10^0
             "00000000000000000000000000001010" when "0001", --10^1
             "00000000000000000000000001100100" when "0010", --10^2
             "00000000000000000000001111101000" when "0011", --10^3
             "00000000000000000010011100010000" when "0100", --10^4
             "00000000000000011000011010100000" when "0101", --10^5
             "00000000000011110100001001000000" when "0110", --10^6
             "00000000100110001001011010000000" when "0111", --10^7
             "00000101111101011110000100000000" when "1000", --10^8
             "00111011100110101100101000000000" when "1001", --10^9
             "0" when others;
end Behavioral;

Answer 1

您了解问题出在哪里，所以这个答案只是为了向您展示如何避免对十个 32 位常量（使用 VHDL 2008）进行外部计算，这要归功于 ieee.numeric_std_unsigned 包和一个由函数计算的 32 位向量常量数组：

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std_unsigned.all;

entity main is
...
end main;

architecture Behavioral of main is

  type w32_array is array(0 to 15) of std_ulogic_vector(31 downto 0);

  function powers_of_ten return w32_array is
    variable res: w32_array := (others => (others => '0'));
  begin
    for i in 0 to 9 loop
      res(i) := to_stdulogicvector(10**i, 32);
    end loop;
    return res;
  end function powers_of_ten;

  constant pw10: w32_array := powers_of_ten;

begin

  output <= pw10(to_integer(input));

end architecture Behavioral;

Note: and yes, it should be synthesisable, because it is the synthesizer that computes the constants during synthesis, not the synthesized hardware.

VHDL 10^x LUT With-Select

VHDL 10^x LUT With-Select

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