皮层从 RAM 执行
cortex execute from RAM
我需要在 Cortex-M1 处理器的 RAM 中执行固件来擦除和重写闪存。我正在使用 eclipse 和 launchpad 的工具链。
MDK-ARM也有类似的问题:How do I execute a function from RAM on a Cortex-M3 (STM32)?
从闪存到 运行 固件我配置链接器脚本:
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 8K
RAM (rw) : ORIGIN = 0x20004000, LENGTH = 16K
}
然后使用 JLink.exe 实用程序我得到:
J-Link>r
Reset delay: 0 ms
Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
J-Link>mem32 0x00,2
00000000 = 20008000 00000101
J-Link>SetPC 0x0101
Info: Cortex-M: Debugger tries to set PC to odd value. Corrected register value from 0x00000101 to 0x00000100
J-Link>wreg MSP 0x20008000
MSP = 0x20008000
J-Link>halt
PC = 00000100, CycleCnt = 00000000
R0 = 00000300, R1 = 00000300, R2 = 00000010, R3 = 400A8000
R4 = 00001000, R5 = 2010108C, R6 = 00002040, R7 = 00000021
R8 = 00000000, R9 = 00000000, R10= 00000008, R11= 00000000
R12= 00000000
SP(R13)= 20008000, MSP= 20008000, PSP= 00000000, R14(LR) = FFFFFFFF
XPSR = 01000000: APSR = nzcvq, EPSR = 01000000, IPSR = 000 (NoException)
CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
J-Link>s
00000100: 09 49 LDR R1, [PC, #+0x24]
J-Link>s
00000102: 0A 4A LDR R2, [PC, #+0x28]
J-Link>s
00000104: 0A 4B LDR R3, [PC, #+0x28]
J-Link>s
00000106: 00 F0 07 F8 BL #+0x0E
J-Link>s
00000118: 9B 1A SUB R3, R3, R2
J-Link>
然后我想从 RAM 运行 固件。为此,我配置了链接描述文件:
MEMORY
{
FLASH (rx) : ORIGIN = 0x20001000, LENGTH = 8K
RAM (rw) : ORIGIN = 0x20004000, LENGTH = 16K
}
这是我在执行时遇到的错误:
J-Link>r
Reset delay: 0 ms
Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
J-Link>loadbin milandr-template.bin 0x20001000
Downloading file [milandr-template.bin]...O.K.
J-Link>mem32 0x20001000,2
20001000 = 20008000 20001101
J-Link>SetPC 0x20001101
Info: Cortex-M: Debugger tries to set PC to odd value. Corrected register value from 0x20001101 to 0x20001100
J-Link>wreg MSP 0x20008000
MSP = 0x20008000
J-Link>halt
PC = 20001100, CycleCnt = 00000000
R0 = 00000300, R1 = 00000300, R2 = 00000010, R3 = 400A8000
R4 = 00000648, R5 = 00000001, R6 = 00000648, R7 = 00000064
R8 = 00000800, R9 = 00000000, R10= 01000008, R11= 00000000
R12= 00000000
SP(R13)= 20008000, MSP= 20008000, PSP= 00000000, R14(LR) = FFFFFFFF
XPSR = 01000000: APSR = nzcvq, EPSR = 01000000, IPSR = 000 (NoException)
CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
J-Link>s
20001100: 09 49 LDR R1, [PC, #+0x24]
J-Link>s
00000140: FE E7 B #-0x04
J-Link>
这里是处理器跳转到位于闪存区域的地址 - 0x00000140
。
没有达到预期的 0x20000102
。
两种情况下的 Hex 文件一一相似。
看来我需要检查第一条指令执行结果的差异:
00000100: 09 49 LDR R1, [PC, #+0x24]
可能有人已经遇到了,报错。
LDR
指令在从 RAM 执行时产生错误。大多数默认故障处理程序如下所示:
B .
您需要查看故障寄存器以获取更多信息。但是由于您的原始 RAM 似乎从 0x20004000
开始,因此地址 0x20001000
处可能没有 RAM。
您可以尝试这样的链接器文件:
MEMORY
{
FLASH (rx) : ORIGIN = 0x20004000, LENGTH = 8K
RAM (rw) : ORIGIN = 0x20006000, LENGTH = 8K
}
我需要在 Cortex-M1 处理器的 RAM 中执行固件来擦除和重写闪存。我正在使用 eclipse 和 launchpad 的工具链。 MDK-ARM也有类似的问题:How do I execute a function from RAM on a Cortex-M3 (STM32)?
从闪存到 运行 固件我配置链接器脚本:
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 8K
RAM (rw) : ORIGIN = 0x20004000, LENGTH = 16K
}
然后使用 JLink.exe 实用程序我得到:
J-Link>r
Reset delay: 0 ms
Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
J-Link>mem32 0x00,2
00000000 = 20008000 00000101
J-Link>SetPC 0x0101
Info: Cortex-M: Debugger tries to set PC to odd value. Corrected register value from 0x00000101 to 0x00000100
J-Link>wreg MSP 0x20008000
MSP = 0x20008000
J-Link>halt
PC = 00000100, CycleCnt = 00000000
R0 = 00000300, R1 = 00000300, R2 = 00000010, R3 = 400A8000
R4 = 00001000, R5 = 2010108C, R6 = 00002040, R7 = 00000021
R8 = 00000000, R9 = 00000000, R10= 00000008, R11= 00000000
R12= 00000000
SP(R13)= 20008000, MSP= 20008000, PSP= 00000000, R14(LR) = FFFFFFFF
XPSR = 01000000: APSR = nzcvq, EPSR = 01000000, IPSR = 000 (NoException)
CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
J-Link>s
00000100: 09 49 LDR R1, [PC, #+0x24]
J-Link>s
00000102: 0A 4A LDR R2, [PC, #+0x28]
J-Link>s
00000104: 0A 4B LDR R3, [PC, #+0x28]
J-Link>s
00000106: 00 F0 07 F8 BL #+0x0E
J-Link>s
00000118: 9B 1A SUB R3, R3, R2
J-Link>
然后我想从 RAM 运行 固件。为此,我配置了链接描述文件:
MEMORY
{
FLASH (rx) : ORIGIN = 0x20001000, LENGTH = 8K
RAM (rw) : ORIGIN = 0x20004000, LENGTH = 16K
}
这是我在执行时遇到的错误:
J-Link>r
Reset delay: 0 ms
Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
J-Link>loadbin milandr-template.bin 0x20001000
Downloading file [milandr-template.bin]...O.K.
J-Link>mem32 0x20001000,2
20001000 = 20008000 20001101
J-Link>SetPC 0x20001101
Info: Cortex-M: Debugger tries to set PC to odd value. Corrected register value from 0x20001101 to 0x20001100
J-Link>wreg MSP 0x20008000
MSP = 0x20008000
J-Link>halt
PC = 20001100, CycleCnt = 00000000
R0 = 00000300, R1 = 00000300, R2 = 00000010, R3 = 400A8000
R4 = 00000648, R5 = 00000001, R6 = 00000648, R7 = 00000064
R8 = 00000800, R9 = 00000000, R10= 01000008, R11= 00000000
R12= 00000000
SP(R13)= 20008000, MSP= 20008000, PSP= 00000000, R14(LR) = FFFFFFFF
XPSR = 01000000: APSR = nzcvq, EPSR = 01000000, IPSR = 000 (NoException)
CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
J-Link>s
20001100: 09 49 LDR R1, [PC, #+0x24]
J-Link>s
00000140: FE E7 B #-0x04
J-Link>
这里是处理器跳转到位于闪存区域的地址 - 0x00000140
。
没有达到预期的 0x20000102
。
两种情况下的 Hex 文件一一相似。
看来我需要检查第一条指令执行结果的差异:
00000100: 09 49 LDR R1, [PC, #+0x24]
可能有人已经遇到了,报错。
LDR
指令在从 RAM 执行时产生错误。大多数默认故障处理程序如下所示:
B .
您需要查看故障寄存器以获取更多信息。但是由于您的原始 RAM 似乎从 0x20004000
开始,因此地址 0x20001000
处可能没有 RAM。
您可以尝试这样的链接器文件:
MEMORY
{
FLASH (rx) : ORIGIN = 0x20004000, LENGTH = 8K
RAM (rw) : ORIGIN = 0x20006000, LENGTH = 8K
}