AArch64 异常优先级

Question

在研究AArch64中的异常处理时，我发现没有关于同步和异步异常优先级比较的信息。

那么当同步异常和异步异常同时发生时，processor会怎么做呢？ 执行指令后是否检测或异步异常（中断）？如果是，则不可能同时收到两种异常。是吗？

Answer 1

规范以实际上不允许并发的方式处理此问题。

来自 the manual 的 D1.13.4 部分，“中断的优先级和识别”：

Any interrupt that is pending before a Context synchronization event in the following list, is taken before the first instruction after the context synchronizing event, provided that the pending interrupt is not masked:

• Execution of an ISB instruction.
• Exception entry, if FEAT_ExS is not implemented, or if FEAT_ExS is implemented and the appropriate SCTLR_ELx.EIS bit is set.
• [...]

所以它本质上是在问“在异常进入发生时是否有挂起的中断？”，答案是是或否，这隐含地产生了顺序。

不过有一个例外：

• If the first instruction after the context synchronizing event generates a synchronous exception, then the architecture does not define whether the PE takes the interrupt or the synchronous exception first.

而且还必须这样说：

In the absence of a specific requirement to take an interrupt, the architecture only requires that unmasked pending interrupts are taken in finite time.

除了上述之外，实现可以自由地做任何事情。