VHDL if 语句 - 文本附近的语法错误

Question

谁能看出我的代码有什么问题？

我在评论行中收到错误消息。在文本附近说语法错误。我试图从二进制数更改为十六进制数，但一直出现相同的错误。如果错误是选择了评论。

这是错误：

Error (10500): VHDL syntax error at MAL.vhd(26) near text
Error (10500): VHDL syntax error at MAL.vhd(26) near text ""; expecting "then"
Error (10500): VHDL syntax error at MAL.vhd(26) near text Error (10500): VHDL syntax error at MAL.vhd(26) near text ¬
Error (10500): VHDL syntax error at MAL.vhd(29) near text "else"; expecting "end", or "(", or an identifier ("else" is a reserved keyword), or a sequential statement
Error (10500): VHDL syntax error at MAL.vhd(31) near text "if"; expecting "process"

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
USE ieee.std_logic_unsigned.ALL;

ENTITY MAL IS
    PORT (
        clk_50 : IN std_logic;
        pulse_out : OUT std_logic
    );
END MAL;

ARCHITECTURE behave OF MAL IS
    SIGNAL pulse : std_logic;
    SIGNAL counter : std_logic_vector(15 DOWNTO 0);
BEGIN
    PROCESS (clk_50) IS
    BEGIN
        pulse <= '0';
        -- if counter = ‭x"‭C34F‬"‬ then
        -- counter <= (others => '0');
        pulse <= '1';
        -- else
        counter <= counter + 1;
        END IF;
    END PROCESS;

    --output
    pulse_out <= pulse;

END ARCHITECTURE behave;

Answer 1

你那里有一些非法字符。去掉第27行重新写应该就可以了

VHDL if 语句 - 文本附近的语法错误

VHDL if statement - Syntax error near text

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