VHDL 如何将文件的输出分配为包中的常量?

VHDL How to assign outputs from file as constants in package?

我想从一个文本文件中读取大的整数数组,并将这些数组指定为我的包中的常量。我该怎么做?我做了一个从文件中读取的过程,输出是我想要的数组:

       P1: process
       file vec_file: text open read_mode is "mytext";
       variable iline: line;
       variable data_read: integer;
       variable x: integer := 0;
       begin

          while not endfile (vec_file) loop
            readline (vec_file, iline);
            read(iline,data_read);
            wait until rising_edge(clk); 
            output(x) <= data_read;
            x := x + 1;

          end loop;
          wait until rising_edge(clk); 
          wait;
      END process P1;

但是我如何将这个数组作为常量分配给我的包呢? 我应该在包体中创建一个函数而不是过程吗? 提前致谢!

通过读取文件的函数初始化包中的常量数组,如下所示:

package pkg is
  type output_t is array(0 to 9) of integer;  -- Just change size
  constant output : output_t;  -- Value assign is deferred
end package;

library std;
use std.textio.all;
package body pkg is

  -- Entries in output without value in file are assigned to 0
  impure function output_init return output_t is
    file vec_file: text open read_mode is "mytext";
    variable iline: line;
    variable data_read: integer;
    variable x: integer := 0;
    variable res_t : output_t := (others => 0);
  begin
    while not endfile (vec_file) loop
      readline (vec_file, iline);
      read(iline,data_read);
      res_t(x) := data_read;
      x := x + 1;
    end loop;
    return res_t;
  end function;

  constant output : output_t := output_init;

end package body;