STM32 DMA：缓冲区中剩余的字节，已编码？

Question

很长一段时间以来，我一直在为以某种形式与两块 STM32 板进行 DMA 通信而苦苦挣扎。我目前的问题如下。

我有一个主机（一个Raspberry Pi）运行下面的代码，等待开发板初始化通信：

#include <fcntl.h>
#include <stdio.h>

int main(int argc, char *argv[]) {
    unsigned int usbdev;
    unsigned char c;
    system("stty -F /dev/ttyUSB0 921600 icanon raw");
    usbdev = open("/dev/ttyUSB0", O_RDWR);
    setbuf(stdout, NULL);
    fprintf(stderr, "Waiting for signal..\n");
    while (!read(usbdev, &c, 1));
    unsigned char buf[] = "Defend at noon\r\n";
    write(usbdev, buf, 16);
    fprintf(stderr, "Written 16 bytes\r\n");
    while (1) {
        while (!read(usbdev, &c, 1));
        printf("%c", c);
    }
    return 0;
}

基本上它会在发送 "Defend at noon" 到电路板之前等待一个字节的数据，然后打印所有发回的数据。

板子先发出一个字节，然后等待所有传入的数据，替换几个字节并发回。请参阅此 post 末尾的代码。该板可以是 STM32L100C 或 STM32F407（实际上是发现板）；在这一点上，我遇到了相同的行为。

我看到的输出（在美好的一天 - 在糟糕的一天它挂在 Written 16 bytes 上）如下：

Waiting for signal..
Written 16 bytes
^JDefend adawnon

如您所见，数据已发送，并按预期替换了四个字节，但前面多了两个字符（^J，或0x5E和0x4A） .这些结果是 signal_host 函数的直接结果。当我用任意内容（例如 x）替换字符时，这就是在该位置输出的内容。有趣的是 \n 实际上在路上的某个地方被转换为插入符号 ^J。这似乎发生在到板的通信中，因为当我简单地在缓冲区中硬编码一个字符串并使用 dma_transmit 将其发送到非交互式主机程序时，它打印得很好。

从某些缓冲区未正确清除的意义上说，我似乎以某种方式错误配置了 DMA。此外，我不太相信主机端程序使用 stty 的方式。但是，我实际上 过去使用这个确切的代码 进行了完美的通信工作。我将它与几个月来存储在 git 历史记录中的代码进行了比较，但我找不到 difference/flaw.

注意下面的代码使用了libopencm3 and is based on examples from libopencm3-examples.

STM32L1代码：

#include <libopencm3/stm32/rcc.h>
#include <libopencm3/stm32/gpio.h>
#include <libopencm3/stm32/usart.h>
#include <libopencm3/cm3/nvic.h>
#include <libopencm3/stm32/dma.h>

void clock_setup(void)
{
    rcc_clock_setup_pll(&clock_config[CLOCK_VRANGE1_HSI_PLL_32MHZ]);
    rcc_periph_clock_enable(RCC_GPIOA);
    rcc_periph_clock_enable(RCC_USART2);
    rcc_periph_clock_enable(RCC_DMA1);
}

void gpio_setup(void)
{
    gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2 | GPIO3);
    gpio_set_af(GPIOA, GPIO_AF7, GPIO2 | GPIO3);
}

void usart_setup(int baud)
{
    usart_set_baudrate(USART2, baud);
    usart_set_databits(USART2, 8);
    usart_set_stopbits(USART2, USART_STOPBITS_1);
    usart_set_mode(USART2, USART_MODE_TX_RX);
    usart_set_parity(USART2, USART_PARITY_NONE);
    usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE);

    usart_enable(USART2);
}

void dma_request_setup(void)
{
    dma_channel_reset(DMA1, DMA_CHANNEL6);

    nvic_enable_irq(NVIC_DMA1_CHANNEL6_IRQ);

    dma_set_peripheral_address(DMA1, DMA_CHANNEL6, (uint32_t) &USART2_DR);
    dma_set_read_from_peripheral(DMA1, DMA_CHANNEL6);

    dma_set_peripheral_size(DMA1, DMA_CHANNEL6, DMA_CCR_PSIZE_8BIT);
    dma_set_memory_size(DMA1, DMA_CHANNEL6, DMA_CCR_MSIZE_8BIT);

    dma_set_priority(DMA1, DMA_CHANNEL6, DMA_CCR_PL_VERY_HIGH);

    dma_disable_peripheral_increment_mode(DMA1, DMA_CHANNEL6);
    dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL6);

    dma_disable_transfer_error_interrupt(DMA1, DMA_CHANNEL6);
    dma_disable_half_transfer_interrupt(DMA1, DMA_CHANNEL6);
    dma_enable_transfer_complete_interrupt(DMA1, DMA_CHANNEL6);
}

void dma_transmit_setup(void)
{
    dma_channel_reset(DMA1, DMA_CHANNEL7);

    nvic_enable_irq(NVIC_DMA1_CHANNEL7_IRQ);

    dma_set_peripheral_address(DMA1, DMA_CHANNEL7, (uint32_t) &USART2_DR);
    dma_set_read_from_memory(DMA1, DMA_CHANNEL7);

    dma_set_peripheral_size(DMA1, DMA_CHANNEL7, DMA_CCR_PSIZE_8BIT);
    dma_set_memory_size(DMA1, DMA_CHANNEL7, DMA_CCR_MSIZE_8BIT);

    dma_set_priority(DMA1, DMA_CHANNEL7, DMA_CCR_PL_VERY_HIGH);

    dma_disable_peripheral_increment_mode(DMA1, DMA_CHANNEL7);
    dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL7);

    dma_disable_transfer_error_interrupt(DMA1, DMA_CHANNEL7);
    dma_disable_half_transfer_interrupt(DMA1, DMA_CHANNEL7);
    dma_enable_transfer_complete_interrupt(DMA1, DMA_CHANNEL7);
}

void dma_request(void* buffer, const int datasize)
{
    dma_set_memory_address(DMA1, DMA_CHANNEL6, (uint32_t) buffer);
    dma_set_number_of_data(DMA1, DMA_CHANNEL6, datasize);

    dma_enable_channel(DMA1, DMA_CHANNEL6);
    signal_host();
    usart_enable_rx_dma(USART2);
}

void dma_transmit(const void* buffer, const int datasize)
{
    dma_set_memory_address(DMA1, DMA_CHANNEL7, (uint32_t) buffer);
    dma_set_number_of_data(DMA1, DMA_CHANNEL7, datasize);

    dma_enable_channel(DMA1, DMA_CHANNEL7);
    usart_enable_tx_dma(USART2);
}

int dma_done(void)
{
    return !((DMA1_CCR6 | DMA1_CCR7) & 1);
}

void dma1_channel6_isr(void) {
    usart_disable_rx_dma(USART2);
    dma_clear_interrupt_flags(DMA1, DMA_CHANNEL6, DMA_TCIF);
    dma_disable_channel(DMA1, DMA_CHANNEL6);
}

void dma1_channel7_isr(void) {
    usart_disable_tx_dma(USART2);
    dma_clear_interrupt_flags(DMA1, DMA_CHANNEL7, DMA_TCIF);
    dma_disable_channel(DMA1, DMA_CHANNEL7);
}

void signal_host(void) {
    usart_send_blocking(USART2, '\n');
}

int main(void)
{
    clock_setup();
    gpio_setup();
    usart_setup(921600);
    dma_transmit_setup();
    dma_request_setup();

    unsigned char buf[16];

    dma_request(buf, 16); while (!dma_done());

    buf[10] = 'd';
    buf[11] = 'a';
    buf[12] = 'w';
    buf[13] = 'n';

    dma_transmit(buf, 16); while (!dma_done());

    while(1);

    return 0;
}

STM32F4代码：

#include <libopencm3/stm32/rcc.h>
#include <libopencm3/stm32/gpio.h>
#include <libopencm3/stm32/usart.h>
#include <libopencm3/cm3/nvic.h>
#include <libopencm3/stm32/dma.h>

void clock_setup(void)
{
    rcc_clock_setup_hse_3v3(&hse_8mhz_3v3[CLOCK_3V3_168MHZ]);
    rcc_periph_clock_enable(RCC_GPIOA);
    rcc_periph_clock_enable(RCC_USART2);
    rcc_periph_clock_enable(RCC_DMA1);
}

void gpio_setup(void)
{
    gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2 | GPIO3);
    gpio_set_af(GPIOA, GPIO_AF7, GPIO2 | GPIO3);
}

void usart_setup(int baud)
{
    usart_set_baudrate(USART2, baud);
    usart_set_databits(USART2, 8);
    usart_set_stopbits(USART2, USART_STOPBITS_1);
    usart_set_mode(USART2, USART_MODE_TX_RX);
    usart_set_parity(USART2, USART_PARITY_NONE);
    usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE);

    usart_enable(USART2);
}

void dma_request_setup(void)
{
    dma_stream_reset(DMA1, DMA_STREAM5);

    nvic_enable_irq(NVIC_DMA1_STREAM5_IRQ);

    dma_set_peripheral_address(DMA1, DMA_STREAM5, (uint32_t) &USART2_DR);
    dma_set_transfer_mode(DMA1, DMA_STREAM5, DMA_SxCR_DIR_PERIPHERAL_TO_MEM);

    dma_set_peripheral_size(DMA1, DMA_STREAM5, DMA_SxCR_PSIZE_8BIT);
    dma_set_memory_size(DMA1, DMA_STREAM5, DMA_SxCR_MSIZE_8BIT);

    dma_set_priority(DMA1, DMA_STREAM5, DMA_SxCR_PL_VERY_HIGH);

    dma_disable_peripheral_increment_mode(DMA1, DMA_SxCR_CHSEL_4);
    dma_enable_memory_increment_mode(DMA1, DMA_STREAM5);

    dma_disable_transfer_error_interrupt(DMA1, DMA_STREAM5);
    dma_disable_half_transfer_interrupt(DMA1, DMA_STREAM5);
    dma_disable_direct_mode_error_interrupt(DMA1, DMA_STREAM5);
    dma_disable_fifo_error_interrupt(DMA1, DMA_STREAM5);
    dma_enable_transfer_complete_interrupt(DMA1, DMA_STREAM5);
}

void dma_transmit_setup(void)
{
    dma_stream_reset(DMA1, DMA_STREAM6);

    nvic_enable_irq(NVIC_DMA1_STREAM6_IRQ);

    dma_set_peripheral_address(DMA1, DMA_STREAM6, (uint32_t) &USART2_DR);
    dma_set_transfer_mode(DMA1, DMA_STREAM6, DMA_SxCR_DIR_MEM_TO_PERIPHERAL);

    dma_set_peripheral_size(DMA1, DMA_STREAM6, DMA_SxCR_PSIZE_8BIT);
    dma_set_memory_size(DMA1, DMA_STREAM6, DMA_SxCR_MSIZE_8BIT);

    dma_set_priority(DMA1, DMA_STREAM6, DMA_SxCR_PL_VERY_HIGH);

    dma_disable_peripheral_increment_mode(DMA1, DMA_SxCR_CHSEL_4);
    dma_enable_memory_increment_mode(DMA1, DMA_STREAM6);

    dma_disable_transfer_error_interrupt(DMA1, DMA_STREAM6);
    dma_disable_half_transfer_interrupt(DMA1, DMA_STREAM6);
    dma_disable_direct_mode_error_interrupt(DMA1, DMA_STREAM6);
    dma_disable_fifo_error_interrupt(DMA1, DMA_STREAM6);
    dma_enable_transfer_complete_interrupt(DMA1, DMA_STREAM6);
}

void dma_request(void* buffer, const int datasize)
{
    dma_set_memory_address(DMA1, DMA_STREAM5, (uint32_t) buffer);
    dma_set_number_of_data(DMA1, DMA_STREAM5, datasize);

    dma_channel_select(DMA1, DMA_STREAM5, DMA_SxCR_CHSEL_4);
    dma_enable_stream(DMA1, DMA_STREAM5);
    signal_host();
    usart_enable_rx_dma(USART2);
}

void dma_transmit(const void* buffer, const int datasize)
{
    dma_set_memory_address(DMA1, DMA_STREAM6, (uint32_t) buffer);
    dma_set_number_of_data(DMA1, DMA_STREAM6, datasize);

    dma_channel_select(DMA1, DMA_STREAM6, DMA_SxCR_CHSEL_4);
    dma_enable_stream(DMA1, DMA_STREAM6);
    usart_enable_tx_dma(USART2);
}

int dma_done(void)
{
    return !((DMA1_S5CR | DMA1_S6CR) & 1);
}

void dma1_stream5_isr(void) {
    usart_disable_rx_dma(USART2);
    dma_clear_interrupt_flags(DMA1, DMA_STREAM5, DMA_TCIF);
    dma_disable_stream(DMA1, DMA_STREAM5);
}

void dma1_stream6_isr(void) {
    usart_disable_tx_dma(USART2);
    dma_clear_interrupt_flags(DMA1, DMA_STREAM6, DMA_TCIF);
    dma_disable_stream(DMA1, DMA_STREAM6);
}

void signal_host(void) {
    usart_send_blocking(USART2, '\n');
}

int main(void)
{
    clock_setup();
    gpio_setup();
    usart_setup(921600);
    dma_transmit_setup();
    dma_request_setup();

    unsigned char buf[16];

    dma_request(buf, 16); while (!dma_done());

    buf[10] = 'd';
    buf[11] = 'a';
    buf[12] = 'w';
    buf[13] = 'n';

    dma_transmit(buf, 16); while (!dma_done());

    while(1);

    return 0;
}

Answer 1

好吧，我可以简单介绍一下。

我建议不要对这种事情使用 stty。我意识到我可能没有正确配置 stty ，并且通过一些选项调整可能会正确设置，但它完全不清楚。我最终将它扔出 window 并使用 pyserial 代替。我几周前就该这么做了。上面的 STM32 代码工作正常，所需的 Python 代码非常简单。

#!/usr/bin/env python3
import serial

dev = serial.Serial("/dev/ttyUSB0", 921600)

dev.read(1)  # wait for the signal
dev.write("Defend at noon\r\n".encode('utf-8'))

while True:
    x = dev.read()
    print(x.decode('utf-8'), end='', flush=True)

STM32 DMA：缓冲区中剩余的字节，已编码？

STM32 DMA: bytes remaining in buffer, encoded?

stm32

dma

stm32f4discovery

stm32ldiscovery

libopencm3