使用移位器和加法器的 8 点 DCT 代码
Code for 8 point DCT using shifters and adders
我已经使用移位器和加法器为 8 点 dct 编写了代码。我没有得到任何错误，但是在模拟时我没有得到预期的结果。
逻辑上是正确的，因为我已经用数学方法解决了。请帮我解决这个漏洞。
预期模式是
X(0)=5 y(0)=1792
X(1)=4 y(1)=710
X(2)=2 y(2)=-191
X(3)=1 y(3)=-153
X(4)=6 y(4)=-128
X(5)=7 y(5)=301
X(6)=2 y(6)=-213
X(7)=1 y(7)=-70
module dct_8(clk,x0,x1,x2,x3,x4,x5,x6,x7,y0,y1,y2,y3,y4,y5,y6,y7
);
input clk;
input [2:0] x0,x1,x2,x3,x4,x5,x6,x7;
output [15:0] y0,y1,y2,y3,y4,y5,y6,y7;
wire[10:0] t089,t075,t050,t018,t189,t175,t150,t118,t289,t275,t250,t218,t389,t375,t350,t318;
wire[3:0] f0,f1,f2,f3,z0,z1,z2,z3;
input_adder_8 m(clk,x0,x1,x2,x3,x4,x5,x6,x7,f0,f1,f2,f3,z0,z1,z2,z3); //a0=f0,b0=z0
new w(clk,f0,f1,f2,f3,y0,y2,y4,y6);
shift_adder_8a p0(clk,z0,t089,t075,t050,t018);
shift_adder_8b p1(clk,z1,t189,t175,t150,t118);
shift_adder_8c p2(clk,z2,t289,t275,t250,t218);
shift_adder_8d p3(clk,z3,t389,t375,t350,t318);
output_adder_8a q(clk,t089,t318,t175,t250,y1);
output_adder_8b r(clk,t289,t075,t350,t118,y3);
output_adder_8c s(clk,t189,t375,t050,t218,y5);
output_adder_8d t(clk,t389,t275,t150,t018,y7);
endmodule
module input_adder_8(clk,x0,x1,x2,x3,x4,x5,x6,x7,f0,f1,f2,f3,z0,z1,z2,z3);
input clk;
input [2:0] x0,x1,x2,x3,x4,x5,x6,x7;
output reg[3:0] f0,f1,f2,f3,z0,z1,z2,z3;
always@(posedge clk)
begin
f0<=x0+x7;
z0<=x0-x7;
f1<=x1+x6;
z1<=x1-x6;
f2<=x2+x5;
z2<=x2-x5;
f3<=x3+x4;
z3<=x3-x4;
end
endmodule
module shift_adder_8a(clk,z0,t089,t075,t050,t018);
input clk;
input [3:0]z0;
output reg[10:0]t089,t075,t050,t018;
reg [6:0] u0,v0;
always@(posedge clk )
begin
u0 <= (z0<<3)+z0;
v0 <= (z0<<4)+u0;
t089 <= (z0<<6)+v0;
t075 <= (v0<<1)+v0;
t050 <= (v0<<1);
t018 = (u0<<1);
end
endmodule
module shift_adder_8b(clk,z1,t189,t175,t150,t118);
input clk;
input [3:0]z1;
output reg[10:0]t189,t175,t150,t118;
reg [6:0] u1,v1;
always@(posedge clk )
begin
u1 <= (z1<<3)+z1;
v1 <= (z1<<4)+u1;
t189 <= (z1<<6)+v1;
t175 <= (v1<<1)+v1;
t150 <= (v1<<1);
t118 <= (u1<<1);
end
endmodule
module shift_adder_8c(clk,z2,t289,t275,t250,t218);
input clk;
input [3:0]z2;
output reg[10:0]t289,t275,t250,t218;
reg [6:0] u2,v2;
always@(posedge clk )
begin
u2 <= (z2<<3)+z2;
v2 <= (z2<<4)+u2;
t289 <= (z2<<6)+v2;
t275 <= (v2<<1)+v2;
t250 <= (v2<<1);
t218 <= (u2<<1);
end
endmodule
module shift_adder_8d(clk,z3,t389,t375,t350,t318);
input clk;
input [3:0]z3;
output reg[10:0]t389,t375,t350,t318;
reg [6:0] u3,v3;
always@(posedge clk )
begin
u3 <= (z3<<3)+z3;
v3 <= (z3<<4)+u3;
t389 <= (z3<<6)+v3;
t375 <= (v3<<1)+v3;
t350 <= (v3<<1);
t318 <= (u3<<1);
end
endmodule
module output_adder_8a(clk,t089,t318,t175,t250,y1);
input clk;
input [10:0] t089,t175,t250,t318;
output reg[15:0] y1;
reg [11:0] c,d;
always@(posedge clk)
begin
c<= t089+t318;
d<= t175+t250;
y1<= c+d;
end
endmodule
module output_adder_8b(clk,t289,t075,t350,t118,y3);
input clk;
input [10:0] t289,t075,t350,t118;
output reg[15:0] y3;
reg [11:0] e,f;
always@(posedge clk)
begin
e<= t289+t118;
f<= t075-t350;
y3<=f-e;
end
endmodule
module output_adder_8c(clk,t189,t375,t050,t218,y5);
input clk;
input [10:0] t189,t375,t050,t218;
output reg[15:0] y5;
reg [11:0] g,h;
always@(posedge clk)
begin
g<= t218-t189;
h<= t375+t050;
y5<=g+h;
end
endmodule
module output_adder_8d(clk,t389,t275,t150,t018,y7);
input clk;
input [10:0] t389,t275,t150,t018;
output reg[15:0] y7;
reg [11:0] i,j;
always@(posedge clk)
begin
i<= t018-t389;
j<= t275-t150;
y7<=i+j;
end
endmodule
//code for 4 dct used in above module
module new(clk,x0,x1,x2,x3,y0,y1,y2,y3);
input clk;
input [3:0]x0,x1,x2,x3;
output [15:0]y0,y1,y2,y3;
wire [4:0]a0,a1,b0,b1;
wire [10:0] t08,t03,t13,t18,t06,t16;
input_adder m1(clk,x0,x1,x2,x3,a0,a1,b0,b1);
shift p1(clk,a0,a1,b0,b1,t08,t03,t18,t13,t06,t16);
output_adder z1(clk,t08,t03,t13,t18,t06,t16,y0,y1,y2,y3);
endmodule
module input_adder(clk,k0,k1,k2,k3,m0,m1,n0,n1);
input clk;
input [3:0]k0,k1,k2,k3;
output reg[4:0] m0,m1,n0,n1;
always@(posedge clk)
begin
m0<=k0+k3;
n0<=k0-k3;
m1<=k1+k2;
n1<=k1-k2;
end
endmodule
module shift(clk,m0,m1,n0,n1,s08,s03,s18,s13,s06,s16);
input clk;
input [4:0]m0,m1,n0,n1;
output reg [10:0]s08,s03,s18,s13,s06,s16;
reg [9:0]p0,q0,p1,q1;
always@( posedge clk)
begin
s06=m0<<6;
s16=m1<<6;
p0= (n0<<3)+n0;
q0= p0<<1;
s03=q0<<1;
s08=(n0<<6)+q0+n0;
p1= (n1<<3)+n1;
q1= p1<<1;
s13=q1<<1;
s18= (n1<<6)+q1+n1;
//assign s06=m0<<6;
//assign s16=m1<<6;
end
endmodule
module output_adder(clk,s08,s03,s13,s18,s06,s16,c0,c1,c2,c3);
input clk;
input [10:0] s08,s03,s18,s13,s06,s16;
output reg [15:0] c0,c1,c2,c3;
always@(posedge clk)
begin
c0<=s06+s16;
c1<=s08+s13;
c2<=s06-s16;
c3<=s03-s18;
end
endmodule
WARNING:Xst:646 - Signal <q1> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
WARNING:Xst:646 - Signal <q0> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
WARNING:Xst:646 - Signal <p1> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
WARNING:Xst:646 - Signal <p0> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <s06_0> (without init value) has a constant value of 0 in block <p1>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <c0_12> (without init value) has a constant value of 0 in block <z1>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t018_0> (without init value) has a constant value of 0 in block <p0>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t118_0> (without init value) has a constant value of 0 in block <p1>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t218_0> (without init value) has a constant value of 0 in block <p2>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t318_0> (without init value) has a constant value of 0 in block <p3>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <y1_13> (without init value) has a constant value of 0 in block <q>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <y5_13> (without init value) has a constant value of 0 in block <s>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <y7_13> (without init value) has a constant value of 0 in block <t>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2404 - FFs/Latches <t050<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8a>.
WARNING:Xst:2404 - FFs/Latches <t018<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8a>.
WARNING:Xst:2404 - FFs/Latches <t150<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8b>.
WARNING:Xst:2404 - FFs/Latches <t118<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8b>.
WARNING:Xst:2404 - FFs/Latches <t250<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8c>.
WARNING:Xst:2404 - FFs/Latches <t218<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8c>.
WARNING:Xst:2404 - FFs/Latches <t350<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8d>.
WARNING:Xst:2404 - FFs/Latches <t318<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8d>.
WARNING:Xst:2404 - FFs/Latches <y1<15:13>> (without init value) have a constant value of 0 in block <output_adder_8a>.
WARNING:Xst:2404 - FFs/Latches <y5<15:13>> (without init value) have a constant value of 0 in block <output_adder_8c>.
WARNING:Xst:2404 - FFs/Latches <y7<15:13>> (without init value) have a constant value of 0 in block <output_adder_8d>.
WARNING:Xst:2404 - FFs/Latches <c0<15:12>> (without init value) have a constant value of 0 in block <output_adder>.
WARNING:Xst:2404 - FFs/Latches <c1<15:12>> (without init value) have a constant value of 0 in block <output_adder>.
WARNING:Xst:1710 - FF/Latch <t018_0> (without init value) has a constant value of 0 in block <shift_adder_8a>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t050_0> (without init value) has a constant value of 0 in block <shift_adder_8a>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t118_0> (without init value) has a constant value of 0 in block <shift_adder_8b>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t150_0> (without init value) has a constant value of 0 in block <shift_adder_8b>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t218_0> (without init value) has a constant value of 0 in block <shift_adder_8c>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t250_0> (without init value) has a constant value of 0 in block <shift_adder_8c>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t318_0> (without init value) has a constant value of 0 in block <shift_adder_8d>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t350_0> (without init value) has a constant value of 0 in block <shift_adder_8d>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <s06_0> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s06_1> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s06_2> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s06_3> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s06_4> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s06_5> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s16_0> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s16_1> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s16_2> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s16_3> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s16_4> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s16_5> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s03_0> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s03_1> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s13_0> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s13_1> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t075_9> (without init value) has a constant value of 0 in block <shift_adder_8a>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t075_10> (without init value) has a constant value of 0 in block <shift_adder_8a>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t175_9> (without init value) has a constant value of 0 in block <shift_adder_8b>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t175_10> (without init value) has a constant value of 0 in block <shift_adder_8b>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t275_9> (without init value) has a constant value of 0 in block <shift_adder_8c>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t275_10> (without init value) has a constant value of 0 in block <shift_adder_8c>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t375_9> (without init value) has a constant value of 0 in block <shift_adder_8d>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t375_10> (without init value) has a constant value of 0 in block <shift_adder_8d>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <q/d_11> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <q/d_10> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s/h_11> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s/h_10> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c0_5> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c0_4> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c0_3> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c0_2> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c0_1> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c0_0> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c2_5> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c2_4> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c2_3> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c2_2> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c2_1> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c2_0> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
警告消息是自我描述的，您只处理四种类型：
WARNING:Xst:646 - Signal <signal_name> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <signal_name> (without init value) has a constant value of 0 in block <hierarchy_name>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2404 - FFs/Latches <signal_name> (without init value) have a constant value of 0 in block <hierarchy_name>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <signal_name> (without init value) has a constant value of 0 in block <hierarchy_name>. This FF/Latch will be trimmed during the optimization process.
这些警告并不意味着任何功能上的错误，并且仍会通过逻辑等效检查。查看警告始终是个好主意，但您不一定需要更改 RTL。我强烈建议您查看 Xst:646 警告，因为它表明您的设计中存在不必要的逻辑，或者您在 RTL 仿真中没有发现连接问题。
大多数警告都报告合成器已经实现了更优化（更低的 gate/flop 计数）然后从它开始的 RTL 推断。
例如shift_adder_8d中t318有警告。 t318 定义为 11 位寄存器，它被分配给 (u3<<1)，其中 u3 是一个 7 位寄存器。无论 u3 的值是多少，t318[10:8] 总是 3'b0 (Xst:2404) 而 t318[0] 总是 1'b0 (Xst:1710)。如果您将其重新编码为：
，则此信号上的警告应该消失（或减少）
initial begin
// ... other inits ....
t318 = 11'b0;
end
always @(posedge clk)
begin
// ... other assigns ...
t318[7:1] <= u3;
end
重新编码值得吗？这取决于你，你的教练，and/or 队友。一般来说，我建议尝试解决警告，除非它对可读性、可伸缩性、灵活性等产生负面影响。这将使警告计数保持较低并更容易识别 useful/surprise 警告（例如：死代码和宽度不匹配）。
其他注意事项：我建议将您的 module new 重命名为更有意义的名称。在 Verilog 中没问题，但如果您每次都启用 SystemVerilog，您将 运行 陷入问题。 SystemVerilog 在 Verilog 的保留关键字之上添加了保留关键字 new、bit、byte、int、logic 以及许多其他关键字。有关保留关键字的完整列表，请参阅 IEEE Std 1800-2012 § 22.14.2 IEEE 1364-1995 关键字 至 § 22.14.8 IEEE 1800-2012 关键字
我已经使用移位器和加法器为 8 点 dct 编写了代码。我没有得到任何错误，但是在模拟时我没有得到预期的结果。
逻辑上是正确的，因为我已经用数学方法解决了。请帮我解决这个漏洞。
预期模式是
X(0)=5 y(0)=1792
X(1)=4 y(1)=710
X(2)=2 y(2)=-191
X(3)=1 y(3)=-153
X(4)=6 y(4)=-128
X(5)=7 y(5)=301
X(6)=2 y(6)=-213
X(7)=1 y(7)=-70
module dct_8(clk,x0,x1,x2,x3,x4,x5,x6,x7,y0,y1,y2,y3,y4,y5,y6,y7
);
input clk;
input [2:0] x0,x1,x2,x3,x4,x5,x6,x7;
output [15:0] y0,y1,y2,y3,y4,y5,y6,y7;
wire[10:0] t089,t075,t050,t018,t189,t175,t150,t118,t289,t275,t250,t218,t389,t375,t350,t318;
wire[3:0] f0,f1,f2,f3,z0,z1,z2,z3;
input_adder_8 m(clk,x0,x1,x2,x3,x4,x5,x6,x7,f0,f1,f2,f3,z0,z1,z2,z3); //a0=f0,b0=z0
new w(clk,f0,f1,f2,f3,y0,y2,y4,y6);
shift_adder_8a p0(clk,z0,t089,t075,t050,t018);
shift_adder_8b p1(clk,z1,t189,t175,t150,t118);
shift_adder_8c p2(clk,z2,t289,t275,t250,t218);
shift_adder_8d p3(clk,z3,t389,t375,t350,t318);
output_adder_8a q(clk,t089,t318,t175,t250,y1);
output_adder_8b r(clk,t289,t075,t350,t118,y3);
output_adder_8c s(clk,t189,t375,t050,t218,y5);
output_adder_8d t(clk,t389,t275,t150,t018,y7);
endmodule
module input_adder_8(clk,x0,x1,x2,x3,x4,x5,x6,x7,f0,f1,f2,f3,z0,z1,z2,z3);
input clk;
input [2:0] x0,x1,x2,x3,x4,x5,x6,x7;
output reg[3:0] f0,f1,f2,f3,z0,z1,z2,z3;
always@(posedge clk)
begin
f0<=x0+x7;
z0<=x0-x7;
f1<=x1+x6;
z1<=x1-x6;
f2<=x2+x5;
z2<=x2-x5;
f3<=x3+x4;
z3<=x3-x4;
end
endmodule
module shift_adder_8a(clk,z0,t089,t075,t050,t018);
input clk;
input [3:0]z0;
output reg[10:0]t089,t075,t050,t018;
reg [6:0] u0,v0;
always@(posedge clk )
begin
u0 <= (z0<<3)+z0;
v0 <= (z0<<4)+u0;
t089 <= (z0<<6)+v0;
t075 <= (v0<<1)+v0;
t050 <= (v0<<1);
t018 = (u0<<1);
end
endmodule
module shift_adder_8b(clk,z1,t189,t175,t150,t118);
input clk;
input [3:0]z1;
output reg[10:0]t189,t175,t150,t118;
reg [6:0] u1,v1;
always@(posedge clk )
begin
u1 <= (z1<<3)+z1;
v1 <= (z1<<4)+u1;
t189 <= (z1<<6)+v1;
t175 <= (v1<<1)+v1;
t150 <= (v1<<1);
t118 <= (u1<<1);
end
endmodule
module shift_adder_8c(clk,z2,t289,t275,t250,t218);
input clk;
input [3:0]z2;
output reg[10:0]t289,t275,t250,t218;
reg [6:0] u2,v2;
always@(posedge clk )
begin
u2 <= (z2<<3)+z2;
v2 <= (z2<<4)+u2;
t289 <= (z2<<6)+v2;
t275 <= (v2<<1)+v2;
t250 <= (v2<<1);
t218 <= (u2<<1);
end
endmodule
module shift_adder_8d(clk,z3,t389,t375,t350,t318);
input clk;
input [3:0]z3;
output reg[10:0]t389,t375,t350,t318;
reg [6:0] u3,v3;
always@(posedge clk )
begin
u3 <= (z3<<3)+z3;
v3 <= (z3<<4)+u3;
t389 <= (z3<<6)+v3;
t375 <= (v3<<1)+v3;
t350 <= (v3<<1);
t318 <= (u3<<1);
end
endmodule
module output_adder_8a(clk,t089,t318,t175,t250,y1);
input clk;
input [10:0] t089,t175,t250,t318;
output reg[15:0] y1;
reg [11:0] c,d;
always@(posedge clk)
begin
c<= t089+t318;
d<= t175+t250;
y1<= c+d;
end
endmodule
module output_adder_8b(clk,t289,t075,t350,t118,y3);
input clk;
input [10:0] t289,t075,t350,t118;
output reg[15:0] y3;
reg [11:0] e,f;
always@(posedge clk)
begin
e<= t289+t118;
f<= t075-t350;
y3<=f-e;
end
endmodule
module output_adder_8c(clk,t189,t375,t050,t218,y5);
input clk;
input [10:0] t189,t375,t050,t218;
output reg[15:0] y5;
reg [11:0] g,h;
always@(posedge clk)
begin
g<= t218-t189;
h<= t375+t050;
y5<=g+h;
end
endmodule
module output_adder_8d(clk,t389,t275,t150,t018,y7);
input clk;
input [10:0] t389,t275,t150,t018;
output reg[15:0] y7;
reg [11:0] i,j;
always@(posedge clk)
begin
i<= t018-t389;
j<= t275-t150;
y7<=i+j;
end
endmodule
//code for 4 dct used in above module
module new(clk,x0,x1,x2,x3,y0,y1,y2,y3);
input clk;
input [3:0]x0,x1,x2,x3;
output [15:0]y0,y1,y2,y3;
wire [4:0]a0,a1,b0,b1;
wire [10:0] t08,t03,t13,t18,t06,t16;
input_adder m1(clk,x0,x1,x2,x3,a0,a1,b0,b1);
shift p1(clk,a0,a1,b0,b1,t08,t03,t18,t13,t06,t16);
output_adder z1(clk,t08,t03,t13,t18,t06,t16,y0,y1,y2,y3);
endmodule
module input_adder(clk,k0,k1,k2,k3,m0,m1,n0,n1);
input clk;
input [3:0]k0,k1,k2,k3;
output reg[4:0] m0,m1,n0,n1;
always@(posedge clk)
begin
m0<=k0+k3;
n0<=k0-k3;
m1<=k1+k2;
n1<=k1-k2;
end
endmodule
module shift(clk,m0,m1,n0,n1,s08,s03,s18,s13,s06,s16);
input clk;
input [4:0]m0,m1,n0,n1;
output reg [10:0]s08,s03,s18,s13,s06,s16;
reg [9:0]p0,q0,p1,q1;
always@( posedge clk)
begin
s06=m0<<6;
s16=m1<<6;
p0= (n0<<3)+n0;
q0= p0<<1;
s03=q0<<1;
s08=(n0<<6)+q0+n0;
p1= (n1<<3)+n1;
q1= p1<<1;
s13=q1<<1;
s18= (n1<<6)+q1+n1;
//assign s06=m0<<6;
//assign s16=m1<<6;
end
endmodule
module output_adder(clk,s08,s03,s13,s18,s06,s16,c0,c1,c2,c3);
input clk;
input [10:0] s08,s03,s18,s13,s06,s16;
output reg [15:0] c0,c1,c2,c3;
always@(posedge clk)
begin
c0<=s06+s16;
c1<=s08+s13;
c2<=s06-s16;
c3<=s03-s18;
end
endmodule
WARNING:Xst:646 - Signal <q1> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
WARNING:Xst:646 - Signal <q0> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
WARNING:Xst:646 - Signal <p1> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
WARNING:Xst:646 - Signal <p0> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <s06_0> (without init value) has a constant value of 0 in block <p1>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <c0_12> (without init value) has a constant value of 0 in block <z1>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t018_0> (without init value) has a constant value of 0 in block <p0>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t118_0> (without init value) has a constant value of 0 in block <p1>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t218_0> (without init value) has a constant value of 0 in block <p2>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t318_0> (without init value) has a constant value of 0 in block <p3>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <y1_13> (without init value) has a constant value of 0 in block <q>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <y5_13> (without init value) has a constant value of 0 in block <s>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <y7_13> (without init value) has a constant value of 0 in block <t>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2404 - FFs/Latches <t050<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8a>.
WARNING:Xst:2404 - FFs/Latches <t018<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8a>.
WARNING:Xst:2404 - FFs/Latches <t150<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8b>.
WARNING:Xst:2404 - FFs/Latches <t118<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8b>.
WARNING:Xst:2404 - FFs/Latches <t250<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8c>.
WARNING:Xst:2404 - FFs/Latches <t218<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8c>.
WARNING:Xst:2404 - FFs/Latches <t350<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8d>.
WARNING:Xst:2404 - FFs/Latches <t318<10:8>> (without init value) have a constant value of 0 in block <shift_adder_8d>.
WARNING:Xst:2404 - FFs/Latches <y1<15:13>> (without init value) have a constant value of 0 in block <output_adder_8a>.
WARNING:Xst:2404 - FFs/Latches <y5<15:13>> (without init value) have a constant value of 0 in block <output_adder_8c>.
WARNING:Xst:2404 - FFs/Latches <y7<15:13>> (without init value) have a constant value of 0 in block <output_adder_8d>.
WARNING:Xst:2404 - FFs/Latches <c0<15:12>> (without init value) have a constant value of 0 in block <output_adder>.
WARNING:Xst:2404 - FFs/Latches <c1<15:12>> (without init value) have a constant value of 0 in block <output_adder>.
WARNING:Xst:1710 - FF/Latch <t018_0> (without init value) has a constant value of 0 in block <shift_adder_8a>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t050_0> (without init value) has a constant value of 0 in block <shift_adder_8a>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t118_0> (without init value) has a constant value of 0 in block <shift_adder_8b>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t150_0> (without init value) has a constant value of 0 in block <shift_adder_8b>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t218_0> (without init value) has a constant value of 0 in block <shift_adder_8c>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t250_0> (without init value) has a constant value of 0 in block <shift_adder_8c>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t318_0> (without init value) has a constant value of 0 in block <shift_adder_8d>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t350_0> (without init value) has a constant value of 0 in block <shift_adder_8d>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <s06_0> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s06_1> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s06_2> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s06_3> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s06_4> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s06_5> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s16_0> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s16_1> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s16_2> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s16_3> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s16_4> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s16_5> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s03_0> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s03_1> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s13_0> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s13_1> (without init value) has a constant value of 0 in block <shift>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t075_9> (without init value) has a constant value of 0 in block <shift_adder_8a>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t075_10> (without init value) has a constant value of 0 in block <shift_adder_8a>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t175_9> (without init value) has a constant value of 0 in block <shift_adder_8b>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t175_10> (without init value) has a constant value of 0 in block <shift_adder_8b>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t275_9> (without init value) has a constant value of 0 in block <shift_adder_8c>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t275_10> (without init value) has a constant value of 0 in block <shift_adder_8c>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <t375_9> (without init value) has a constant value of 0 in block <shift_adder_8d>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <t375_10> (without init value) has a constant value of 0 in block <shift_adder_8d>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <q/d_11> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <q/d_10> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s/h_11> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <s/h_10> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c0_5> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c0_4> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c0_3> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c0_2> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c0_1> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c0_0> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c2_5> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c2_4> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c2_3> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c2_2> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c2_1> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <w/z1/c2_0> (without init value) has a constant value of 0 in block <dct_8>. This FF/Latch will be trimmed during the optimization process.
警告消息是自我描述的，您只处理四种类型：
WARNING:Xst:646 - Signal <signal_name> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <signal_name> (without init value) has a constant value of 0 in block <hierarchy_name>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2404 - FFs/Latches <signal_name> (without init value) have a constant value of 0 in block <hierarchy_name>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <signal_name> (without init value) has a constant value of 0 in block <hierarchy_name>. This FF/Latch will be trimmed during the optimization process.
这些警告并不意味着任何功能上的错误，并且仍会通过逻辑等效检查。查看警告始终是个好主意，但您不一定需要更改 RTL。我强烈建议您查看 Xst:646 警告，因为它表明您的设计中存在不必要的逻辑，或者您在 RTL 仿真中没有发现连接问题。
大多数警告都报告合成器已经实现了更优化（更低的 gate/flop 计数）然后从它开始的 RTL 推断。
例如shift_adder_8d中t318有警告。 t318 定义为 11 位寄存器，它被分配给 (u3<<1)，其中 u3 是一个 7 位寄存器。无论 u3 的值是多少，t318[10:8] 总是 3'b0 (Xst:2404) 而 t318[0] 总是 1'b0 (Xst:1710)。如果您将其重新编码为：
initial begin
// ... other inits ....
t318 = 11'b0;
end
always @(posedge clk)
begin
// ... other assigns ...
t318[7:1] <= u3;
end
重新编码值得吗？这取决于你，你的教练，and/or 队友。一般来说，我建议尝试解决警告，除非它对可读性、可伸缩性、灵活性等产生负面影响。这将使警告计数保持较低并更容易识别 useful/surprise 警告（例如：死代码和宽度不匹配）。
其他注意事项：我建议将您的 module new 重命名为更有意义的名称。在 Verilog 中没问题，但如果您每次都启用 SystemVerilog，您将 运行 陷入问题。 SystemVerilog 在 Verilog 的保留关键字之上添加了保留关键字 new、bit、byte、int、logic 以及许多其他关键字。有关保留关键字的完整列表，请参阅 IEEE Std 1800-2012 § 22.14.2 IEEE 1364-1995 关键字 至 § 22.14.8 IEEE 1800-2012 关键字