在传递带有向量的文件时，如何在测试台中使用枚举？

Question

基本上我在包中声明了一个 typedef 枚举（在一个名为 Definition.sv 的文件中）：

typedef enum logic[3:0] {
                                    AND = 4'b0000,      //AND
                                    EOR = 4'b0001,      //XOR
                                    SUB = 4'b0010,      //Subtraction
                                    ADD = 4'b0100,      //Sum
                                    ORR = 4'b1100,      //OR
                                    MOV = 4'b1101,      //Scrive un valore in un registro
                                    MVN = 4'b1111       //MoVe and Not
            } alu_op;

typedef enum logic[1:0] {
                                    LSL = 2'b00,    //Logical Shift Left
                                    LSR = 2'b01,    //Logical Shift Right
                                    ASR = 2'b10,    //Arithmetic Shift Right
                                    ROR = 2'b11     //Rotation Right
            } shift_op;

然后我写了测试平台：

`timescale 1ns/1ps
`include "Definition.sv"

module ALU_TB ();
    /*Inputs*/
    data_bus     A, B;      //data_bus is a typedef struct packed
    logic        enA, enB;
    logic        invA;
    logic        enC;        
    logic [4:0]  amount;     
    shift_op     sh_select;  
    alu_op       alu_select; 
    /*Outputs*/
    data_bus     data_out, d_out_exp;
    flags_t      flags, flags_exp;
    /*Testbench signals*/
    logic        clk;
    int          Vectors, Errors;
    logic [110:0] VettoriTest[0:99];

ALU_TOP dut (A, B, enA, enB, invA, enC, amount,
             sh_select, alu_select, data_out, flags);

    always 
        begin
            clk = 0;    #5;
            clk = 1;    #5;
        end

    initial
        begin
            $readmemh("Vectors_ALU.txt", VettoriTest);  
            Vectors = 0;
            Errors  = 0;
        end

    always @(posedge clk)
        begin
            A           = VettoriTest [Vectors][31:0] ;
            B           = VettoriTest [Vectors][63:32];
            enA         = VettoriTest [Vectors][64];
            enB         = VettoriTest [Vectors][65];
            invA        = VettoriTest [Vectors][66];
            enC         = VettoriTest [Vectors][67];
            amount      = VettoriTest [Vectors][72:68];
            sh_select   = VettoriTest [Vectors][74:73];   //Error
            alu_select  = VettoriTest [Vectors][78:75];   //Error
            d_out_exp   = VettoriTest [Vectors][110:79];
        end
...
...

这是其中的一部分，错误是： 枚举变量只能分配相同的枚举类型变量或其值之一 我用的软件是Vivado

Answer 1

您必须转换数据类型。应该工作的最简单方法：

sh_select  = shift_op'(VettoriTest [Vectors][74:73]);
alu_select = alu_op'(VettoriTest [Vectors][78:75]);

在传递带有向量的文件时，如何在测试台中使用枚举？

How can i use enum in a testbench while passing a file with vectors?

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verilog

system-verilog

hdl

vivado