$urandom_range()生成的随机数是否为'cyclical random'？

Question

这是来自 SystemVerilog 的验证示例 - 学习测试平台语言功能的指南。在 class 驱动程序中，如果 drop==0 ，交易将丢失。为什么drop = ($urandom_range(0,99) == 0)笔记中每100笔交易可以随机掉1笔？我觉得是1%概率随机掉落

//Test using a callback for error injection
    class Driver_cbs_drop extends Driver_cbs;
      
      virtual task pre_tx(ref Transaction tr, ref bit drop);
           // Randomly drop 1 out of every 100 transactions
           drop = ($urandom_range(0,99) == 0);
      endtask

    endclass

    program automatic test;
     Environment env;

     initial begin
       env = new();
       env.gen_cfg();
       env.build();

       begin // Create error injection callback
         Driver_cbs_drop dcd = new();
         env.drv.cbs.push_back(dcd); // Put into driverÕs Q
       end

       env.run();
       env.wrap_up();
     end
    endprogram

//Driver class with callbacks
    class Driver;
     Driver_cbs cbs[$];
     task run();
       bit drop;
       Transaction tr;

       forever begin
         drop = 0;
         agt2drv.get(tr);
         foreach (cbs[i]) cbs[i].pre_tx(tr, drop);
           if (!drop) continue;

           transmit(tr);

         foreach (cbs[i]) cbs[i].post_tx(tr);
       end
     endtask
    endclass

// Base callback class
    virtual class Driver_cbs; // Driver callbacks 
      virtual task pre_tx(ref Transaction tr, ref bit drop);
      // By default, callback does nothing
      endtask

      virtual task post_tx(ref Transaction tr);
      // By default, callback does nothing
      endtask
    endclass

Answer 1

$urandom_range是概率分布函数；它不是周期性的。要么评论措辞不准确，要么代码没有正确实现。

$urandom_range()生成的随机数是否为'cyclical random'？

Whether the random numbers generated by $urandom_range() are 'cyclical random'?

verilog

system-verilog